Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Bare chip building block packaging method

A packaging method and bare chip technology, applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of low pass rate and production efficiency, large volume, complex process, etc., to reduce area, simplify process, reduce The effect of packaging cost

Inactive Publication Date: 2009-01-14
徐中祐
View PDF9 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] The object of the present invention is to provide a method for packaging multiple integrated circuit bare chips and integrated circuit bare chips for the problems of large volume, complex process, low pass rate and production efficiency in the existing integrated circuit chip packaging technology. A new bare-chip building block packaging method for high-density packaging with other sheet resistors and capacitors and quartz crystal oscillators ( B are- D ies B uilding B lock Technology, BDBB)

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Bare chip building block packaging method
  • Bare chip building block packaging method
  • Bare chip building block packaging method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] Embodiment 1: a video storage card with a USB interface.

[0040] The card includes a USB interface chip, a microcontroller chip and eight 512M X 8 FLASH memories. Movies can be downloaded from the network through the USB interface and the computer, and stored in the FLASH memory on the card. Then insert the card into a portable MP4 video player and watch it on the go. Adopt manufacturing process of the present invention as follows (referring to figure 1 ):

[0041] 1) Press eight 512M×8 FLASH memory bare chips 2-9, a USB interface control chip 10, and a microcontroller chip 11 figure 1 Carry out block-type splicing into a rectangular square matrix, and the blank space without chips is filled with waste chips 12, and the waste chips 12 are filled with waste chips of the same shape and size as the blank in the blank space without chips, and the composition thickness is the same to fill the crowded space. A compact square array of rectangular silicon wafers is placed ...

Embodiment 2

[0048] Embodiment 2: human heart timing monitor (seeing figure 2 with image 3 ).

[0049] In order to monitor the heart conditions of patients with coronary heart disease under different activities, patients need to carry complex 24-hour heart monitors, which brings inconvenience to patients when dressing and bathing. The micro-control chip MCU, quartz crystal oscillator Y1, sheet resistors (R1 and R2), sheet capacitors (C1, C2, and C3) and pressure sensor chip U1 required for accurate timing monitoring are made into miniature sheets by adopting the present invention. The 17mm×34mm timing monitoring board produced by the technology is reduced to a micro-sheet with an area of ​​7mm×7mm and a thickness of 1mm, which can be attached to the chest or placed under the skin all year round. Once the patient has symptoms such as myocardial infarction, an alarm signal can be automatically sent. Adopt the manufacture process of the present invention as follows:

[0050] 1) Microcon...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A modular-packaging method of bare chips includes collecting bare chips to be square array and filling waster chip at blank position, placing said array on base plate of at least 3-layer printed circuit board, cutting out square hole at middle of clamp plate and sheathing said clamp plate at external of square array, covering top plate then setting square array upside down to take off base plate, coating conductive glue at chip back then covering base plate and baking them to form a flat plate, using photo-resist to fill seams, finalizing metal connections and sticking on top plate.

Description

technical field [0001] The invention relates to a new type of integrated circuit packaging module, in particular to a building block packaging method for high-density packaging of multiple integrated circuit bare chips and integrated circuit bare chips with other thin film resistors and capacitors and quartz crystal oscillators. Background technique [0002] The connection between the traditional integrated circuit chip and the chip is realized through the metal wiring of the printed circuit board (PCB). The connection between the semiconductor chip and the printed circuit board usually adopts the following three methods: "bonding" is connected to the metal outer lead frame, packaged with insulating plastic, and then the packaged integrated circuit block is welded to the printed circuit board; 2. The bare chip is directly connected to the printed circuit board through "bonding" 3. Flip-chip welding, that is, the chip is flipped upside down on the printed circuit board, and t...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/50H01L21/60H01L21/98
Inventor 徐中祐
Owner 徐中祐
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products