Method for removing photoresist, and method for fabricating semiconductor component
A technology of photoresist layer and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, photosensitive material processing, etc., can solve the problems of inability to remove photoresist, poor removal speed, etc., and achieve high The effect of process margin and high efficiency
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
example 1
[0045] A shallow trench isolation structure (STI) is formed on a substrate. Then, before the pre-processing process, the height, depth, and thickness of the gap wall of the shallow trench isolation structure on the substrate are measured, and then the temperature is 100 degrees Celsius. Hydrogen and nitrogen plasma up to 260 degrees was used for the pre-treatment process; then, the height and depth of the shallow trench isolation structure on the substrate and the thickness of the spacer were measured again. The results are shown in Table 1. Next, a patterned photoresist layer is formed, and an ion implantation process is performed using the patterned photoresist layer as a mask to form a doped region in the substrate. Then, ashing without carbon tetrafluoride and RCA cleaning solution without dilute hydrofluoric acid at room temperature is used to remove the patterned photoresist layer. The result is as follows image 3 Shown.
example 2
[0047] The method used in Example 2 is the same as that in Example 1, but the pre-treatment process is performed with oxygen plasma at 100°C to 260°C. The results are shown in Table 1 and Figure 4 Shown.
[0048] Table 1
[0049]
[0050] The results in Table 1 show that the measurement results of various dimensions before and after the above-mentioned pre-treatment process are all within the measurement error range, indicating that the pre-treatment process will not affect the dimensions of each component on the surface of the MOS transistor. image 3 with Figure 4 The photo shows that there is no photoresist residue with the method of the present invention.
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More