Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

InA1N/GaN heterojunction enhancement type high electron mobility transistor structure and production method thereof

A high electron mobility, enhanced technology, applied in the field of microelectronics, can solve the problems of enhanced device injection damage, depletion effect stability to be verified, etc., to achieve increased operating voltage range, high forward threshold voltage, reduced Effect of Small Gate Leakage Current

Inactive Publication Date: 2009-11-04
XIDIAN UNIV
View PDF2 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method of manufacturing enhanced devices is prone to implantation damage during the ion implantation process, and the depletion type formed by this method relies on charge induction, and the stability of the depletion effect has yet to be verified.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • InA1N/GaN heterojunction enhancement type high electron mobility transistor structure and production method thereof
  • InA1N/GaN heterojunction enhancement type high electron mobility transistor structure and production method thereof
  • InA1N/GaN heterojunction enhancement type high electron mobility transistor structure and production method thereof

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0039] 1. Epitaxial growth of heterojunction materials

[0040] In the first step, a GaN buffer layer is grown.

[0041] Use single crystal sapphire as the substrate material to grow the GaN buffer layer in the (0001) direction, that is, NH at 950°C 3 and H 2 The sapphire substrate was pretreated at high temperature for 10 minutes in the mixed gas, and then a 30nm low-temperature nucleation layer was grown at 520°C, and then the temperature was raised to 920°C to grow a 1 μm thick GaN buffer layer.

[0042] In the second step, the first InAlN layer is epitaxially grown on the GaN layer.

[0043] After the growth of the 1 μm thick GaN buffer layer is completed, the temperature is set to 800° C., and the first InAlN layer with an In composition of 30% is continuously grown, and the thickness of the first InAlN layer is 20 nm.

[0044] In the third step, a second InAlN layer is epitaxially grown on the first InAlN layer.

[0045] After the epitaxial growth on the first InAlN ...

example 2

[0061] 1. Epitaxial growth of heterojunction materials

[0062] In the first step, a GaN buffer layer is grown.

[0063] The GaN buffer layer was grown on the Si surface of the 4H SiC substrate, that is, the NH 3 and H 2 The sapphire substrate was pretreated at high temperature for 10 minutes in the mixed gas, and then a 30nm low-temperature nucleation layer was grown at 520°C, and then the temperature was raised to 920°C to grow a 2μm thick GaN buffer layer.

[0064] In the second step, the first InAlN layer is epitaxially grown on the GaN layer.

[0065] After the growth of the 2 μm thick GaN buffer layer is completed, the temperature is set to 800° C., and the first InAlN layer with an In composition of 33% is grown continuously, and the thickness of the first InAlN layer is 18 nm.

[0066] In the third step, a second InAlN layer is epitaxially grown on the first InAlN layer.

[0067] After the epitaxial growth on the first InAlN layer is completed, the temperature is s...

example 3

[0083] 1. Epitaxial growth of heterojunction materials

[0084] In the first step, a GaN buffer layer is grown.

[0085] The GaN buffer layer was grown on the Si surface of the 4H SiC substrate, that is, the NH 3 and H 2 The sapphire substrate was pretreated at high temperature for 10 minutes in the mixed gas, and then a 30nm low-temperature nucleation layer was grown at 520°C, and then a 3μm thick GaN buffer layer was grown at 920°C.

[0086] In the second step, the first InAlN layer is epitaxially grown on the GaN layer.

[0087] After the growth of the 3 μm thick GaN buffer layer is completed, the temperature is set to 800° C., and the first InAlN layer with an In composition of 35% is grown continuously, and the thickness of the first InAlN layer is 15 nm.

[0088] In the third step, a second InAlN layer is epitaxially grown on the first InAlN layer.

[0089] After the epitaxial growth on the first InAlN layer is completed, the temperature is set to 800° C., and a seco...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an InAlN / GaN heterojunction enhanced high electron mobility transistor structure and a manufacturing method. The manufacturing process is: 1) epitaxially grow a 1-3 μm GaN layer on a sapphire or SiC substrate; 2) epitaxially grow a first InAlN layer with a thickness of 15-20 nm on the GaN layer, and the In composition is 30-35% , the epitaxial growth temperature is 800°C; 3) Epitaxially grow a second InAlN layer with a thickness of 10-15nm on the first InAlN layer, the In composition is 10-20%, and the epitaxial growth temperature is 800°C; 4) On the second InAlN layer The mesa isolation and ohmic contact of the active region are performed on the active region; 5) The gate photolithography mask is performed on the second InAlN layer, and the second InAlN layer under the gate is removed to form a groove gate structure; 6) Deposited in the gate groove An Al2O3 dielectric layer with a thickness of 3-5nm; 7) Fabricate a gate contact on the Al2O3 dielectric layer, and lead out electrodes to the source, drain and gate. The invention has the advantages of high positive threshold voltage, large positive gate voltage working range and small gate leakage current, and can be used for making enhanced high electron mobility transistors.

Description

technical field [0001] The invention belongs to the technical field of microelectronics and relates to semiconductor materials and device manufacturing, in particular to the structure and manufacturing method of a semiconductor device, which can be used to manufacture enhanced high electron mobility transistors. Background technique [0002] In recent years, the third bandgap semiconductor represented by SiC and GaN has the characteristics of large bandgap, high breakdown electric field, high thermal conductivity, high saturation electron velocity and high concentration of two-dimensional electron gas at the heterojunction interface, making it Widespread concern. In theory, high electron mobility transistor HEMT, light emitting diode LED, laser diode LD and other devices made of these materials have obvious superior characteristics than existing devices, so in recent years, researchers at home and abroad have conducted extensive and in-depth research on them. research and a...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/778H01L29/20H01L21/335
Inventor 王冲郝跃张金凤陈军峰张进城冯倩
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products