Nonvolatile semiconductor memory and its drive method

A non-volatile, semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, read-only memory, etc., can solve problems such as difficult injection of charges, and achieve high-speed reading effects

CN101490838AActive Publication Date: 2009-07-22TOHOKU UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2009-07-22

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Abstract

The invention provides a NOR-type nonvolatile semiconductor memory that can inject electric charge into a charge accumulation layer through the use of an FN tunnel current without compromising an increase in the packing density of memory cells. The above problem is solved by a nonvolatile semiconductor memory in which nonvolatile semiconductor memory cells are arranged in a matrix, each nonvolatile semiconductor memory cell having an island semiconductor layer in which a drain diffusion layer formed in the upper part of the island semiconductor layer, a source diffusion layer formed in the lower part of the island semiconductor layer, a charge accumulation layer formed on a channel region of the side wall sandwiched between the drain diffusion layer and the source diffusion layer via a gate insulation film, and a control gate formed on the charge accumulation layer are formed. Further, bit lines connected to the drain diffusion layer are laid out in a column direction, control gate lines are laid out in a row direction, and source lines connected to the source diffusion layer are laid out in the column direction.
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Description

technical field

[0001] The invention relates to a nonvolatile semiconductor memory and a driving method thereof. Background technique

[0002] In a NOR flash memory cell (memory cell) having a control gate and a charge storage layer, a MOS transistor structure is known in which hot electrons are used to inject charges into the charge storage layer (see, for example, Non-Patent Document 1). The difference in threshold voltage due to the difference in the charge storage state of the charge storage layer is stored as data "0" and "1". For example, in the case of an N-channel memory cell using a floating gate in the charge storage layer, charges are injected into the floating gate, a high voltage is applied to the control gate and the drain diffusion layer, and the source diffusion layer and semiconductor substrate ground. At this time, the energy of the electrons in the semiconductor substrate is increased by the voltage between the source and the drain, so that they overcome...

Examples

Embodiment

[0113] Hereinafter, the present invention will be described based on the embodiments shown in the drawings. In addition, the present invention is not limited thereto.

[0114] Figure 5 , Image 6 , Figure 7 , Figure 8 The layout and cross-sectional structure of the nonvolatile semiconductor memory according to the present invention are shown respectively. In this embodiment, the source line 2 and the source diffusion layer 3 are formed on the silicon oxide film 1, the island-shaped semiconductor layer 4 is formed thereon, and the drain diffusion layer 5 is formed on the top of the island-shaped semiconductor layer 4. A charge storage layer 6 formed of a gate insulating film is formed on the channel region of the side wall sandwiched by the drain diffusion layer 5 and the source diffusion layer 3, and the control gate 7 is formed on the charge storage layer 6, thereby forming storage unit. In addition, an island-shaped semiconductor layer 9 is formed on the source line...