Erasing and writing method of phase change memory
A technology of phase-change memory and phase-change materials, which is applied in the field of micro-nano electronics, can solve problems such as high cost, and achieve the effects of optimizing cost, reducing device power consumption, and improving thermal efficiency
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Embodiment 1
[0062] The axisymmetric structure of the longitudinal section of the phase change memory device is as follows: figure 1 As shown, the material of the lower electrode 11 is W, and the phase change material 12 is Ge 2 Sb 2 Te 5 , the material of the upper electrode 13 is W, and the surrounding insulating material 14 is SiO 2 , the central axis of symmetry 15 . The bottom electrode has a radius of 20 nm. The thickness of the phase change material is 150nm.
[0063] Step 1, apply a single pulse to the device, such as figure 2 As shown, the pulse height is 0.20-0.30mA, preferably 0.25mA in this embodiment, and the pulse width (operating time) is 20-120ns, preferably 100ns. The device reaches thermal equilibrium at 25-30ns. That is to say, when the device passes current, on the one hand, the phase change material generates heat, and on the other hand, the device dissipates heat through the upper and lower electrodes and the surrounding dielectric materials. When it is less t...
Embodiment 2
[0070] Adopt the same technical solution as in Embodiment 1, except that the pulse signal used is a voltage pulse.
[0071] Step 1, apply a single pulse to the device, such as Figure 9 As shown, the pulse height is 0.3-0.7V, preferably 0.3V in this embodiment, and the pulse width (operating time) is 20-120ns, preferably 100ns. The device reaches thermal equilibrium at 25-30ns. keep the temperature as Figure 11a , 11b shown, where Figure 11b Within the range wrapped by the melting temperature isotherm 111, the phase change material melts, the pulse stops, the temperature drops rapidly, and the melting region forms Figure 11a The amorphous region 112 . The amorphous fails to seal the lower electrode, and fails to form a high-resistance and low-resistance series connection, so the device resistance remains in a low-resistance state. like Figure 14 As shown by the square data points at 141, 142, 143, the resistance has been maintained at 4.3kohm.
[0072] Step 2, appl...
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