Single gate pole non-volatile internal storage and its operation method

Abstract

The non-volatile memory includes transistor and capacitance structure embedded in substrate of semiconductor. The transistor includes first electric gate electrode, first dielectric layer, and first ion adulteration area. The capacitance structure includes second electric gate electrode, second dielectric layer, and second ion adulteration area. The first electric gate electrode and the second electric gate electrode are connected each other in electrically to form single suspended jointed gate electrode of memory cell. Using reversal bias, the memory cell can carry out writing, erasing, and reading operations. When operation on insulated trap area, applying positive, negative voltages to drain electrode, gate electrode and silicon substrate or trap area, the method generates inverse layer to reduce absolute voltage and area of boost up circuit so as to lower current consumption.

Description

technical field [0001] The present invention relates to a non-volatile memory (Non-Volatile Memory) and its operating method, in particular to a single-gate non-volatile memory capable of writing and erasing at low voltage and low current consumption and its operation method. How to do it. Background technique [0002] Press, complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) manufacturing process technology has become a common manufacturing method of application specific integrated circuit (ASIC). With the development of computer information products today, Electronically Erasable Programmable Read Only Memory (EEPROM) has the function of electrically writing and erasing data due to its non-volatile memory function, and after the power is turned off Data will not disappear, so it is widely used in electronic products. [0003] Non-volatile memory is programmable to store charge to change the gate voltage of the memory's transistors, or...

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Problems solved by technology

[0004] In view of the above problems, the main purpose of the present invention is to provide a single gate non-volatile memory and its operation method, which uses a single floating gate structure, and when programming, a real useful voltage is applied to the source Or apply a back bias to the transistor base to generate a wider depleted source-substrate junction, thereby improving the efficiency of current flow to the floating gate, so as to greatly reduce the non-volatile memory of the programmed single gate. current demand

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