Storage device and information rerecording method

A storage device and information recording technology, applied in digital memory information, information storage, static memory and other directions, can solve the problems of large write current and difficult miniaturization, and achieve the effect of reducing the number and the size of peripheral circuits

Inactive Publication Date: 2010-11-17
SONY CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, there is a problem that it is not easy to miniaturize in FeRAM, and there ...

Method used

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  • Storage device and information rerecording method
  • Storage device and information rerecording method
  • Storage device and information rerecording method

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no. 1 approach

[0031] figure 1 A storage unit 1 of a storage device according to a first embodiment of the present invention is shown. Storage unit 1 includes such as figure 2 A memory element of a variable resistance element 10 and an N-channel MOS type transistor 20 as a switching element are shown in FIG. In this storage device, a plurality of storage cells 1 as storage units are arranged in a matrix form. image 3 An equivalent circuit at the time of a write operation of the memory cell 1 is shown.

[0032] For example, variable resistance element 10 is formed by stacking electrode 11 , ion source layer 12 , high resistance layer (variable resistance layer) 13 , and electrode 14 .

[0033] The electrodes 11 and 14 are composed of metal materials such as Al, Cu, and W. The high-resistance layer 13 is composed of, for example, a metal material, a rare earth element, an oxide or nitride composed of a mixture of a metal material and a rare earth element, or a semiconductor material. A...

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Abstract

Provided is a storage device wherein a voltage requiring control is reduced and a peripheral circuit scale is reduced. A first pulse voltage (VBLR) is supplied to an electrode (11) of a variable resistance element (10) from a first power supply (21) through a bit line (BLR), a second pulse voltage (VWL) for cell selection is supplied to a control terminal (20c) of a transistor (20) from a second power supply (22) through a word line (WL), and a third pulse voltage (VBLT) is supplied to a second input/output terminal (20b) of the transistor (20) from a third power supply (23) through the bit line (BLT). At the time of rewriting information, a cell voltage and a cell current can be varied (reduced or increased) by adjusting the voltage value (VBLT) of the third power supply (23) by the adjusting circuit (24).

Description

technical field [0001] The present invention relates to a storage device including a storage unit having a storage element and a switching element, and more particularly, to a storage device having a driving source for controlling re-recording by verification and an information re-recording method. Background technique [0002] In information equipment such as computers, high-density DRAM (Dynamic Random Access Memory) capable of high-speed operation has been widely used. However, in DRAM, since its manufacturing process is more complicated than that of general logic circuits, general signal processing circuits, etc. used in electronic equipment, there is a problem of high manufacturing cost. Furthermore, since DRAM is a volatile memory (in which information is not retained if power is turned off), refresh operations need to be performed frequently. [0003] Therefore, as a nonvolatile memory in which information is retained even if the power supply is turned off, for examp...

Claims

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Application Information

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IPC IPC(8): G11C13/00
CPCG11C2013/009G11C2213/82G11C13/0004G11C2013/0073G11C2213/56G11C2213/79G11C2013/0071G11C13/0069G11C13/0007G11C13/0002
Inventor 椎本恒则对马朋人保田周一郎
Owner SONY CORP
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