Method for producing SOI (Silicon on Insulator) LDMOS (Laterally Diffused Metal Oxide Semiconductor) device provided with multi-layer super-junction structure

Abstract

The invention discloses a method for producing an SOI LDMOS device provided with a multi-layer super-junction structure, which comprises the steps of: carrying out ion implantation on top layer silicon by adopting SOI substrate to form a first layer of super-junction structure; then preparing an extensionality layer on the SOI substrate provided with at least one layer of super-junction structure, manufacturing the other layer of super-junction structure by utilizing the same technological conditions for manufacturing the first layer of super-junction structure, and ensuring that the n-type pillar regions and the p-type pillar regions of the upper layer and the lower layer are alternately arranged to form a multi-layer super-junction structure comprising at least two layers of super-junction structure; and manufacturing body regions, grid regions, source regions, drain regions and body contact regions to finish the device. The multi-layer super-junction structure is formed by adopting the extensionality and ion implantation technology, the p-type pillar regions and the n-type pillar regions of the upper and the lower layer super-junction structures are alternately arranged to further increase the contact area among the p-type pillar regions and the n-type pillar regions without bringing remarkable side effects; and the anti-breakdown capacity of the device produced by the invention is higher than that of the traditional super-junction LDMOS.

Description

technical field [0001] The invention relates to a method for manufacturing a lateral double-diffused metal oxide semiconductor (LDMOS, Lateral Double-diffused MOSFET) device structure, in particular to a method for manufacturing an SOI LDMOS device with a multilayer superjunction structure, belonging to the technical field of semiconductor manufacturing . Background technique [0002] Lateral Double-diffused MOSFET (LDMOS, Lateral Double-diffused MOSFET) is the key technology of high-voltage integrated circuit HVIC (High Voltage Integrated Circuit) and power integrated circuit PIC (Power Integrated Circuit). Its main feature is that a relatively long lightly doped drift region is added between the channel region and the drain region. The doping type of the drift region is consistent with that of the drain end. By adding the drift region, it can share the breakdown voltage. [0003] The so-called super-junction LDMOS is an improved LDMOS, that is, the low-doped N-type drift ...

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Problems solved by technology

[0005] Usually, in order to make devices with the same drift region length and width fully depleted as much as possible under the maximum breakdown voltage, the width of the p / n column area can be reduced and the depth of the p / n column area can be increased, that is, the column area can be increased as much as possible. The essence of the aspect ratio of the region is to increase the contact area between the p / n column regions, that is, to increase the area of ​​the p / n junction depletion region inside the drift region. However, it is actually limited by the process conditions and cannot Further obtain a smaller pillar region width and a deeper pillar region depth, which is because: firstly, superjunction devices need to be annealed in the subsequent high-energy ion implantation process, so narrow pillar regions are likely to cause different types of Impurities diffuse and pollute each other, resulting in an imbalance of charges inside the p / n column region, which will reduce the actual breakdown resistance; secondly, too deep a column region is bound to be accompanied by high-energy ion implantation, which is likely to cause internal damage to the device, and the column region The distribution of internal impurities is very uneven, which will still cause the problem of charge imbalance between adjacent p / n columns, thereby reducing the actual breakdown resistance of the device

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