Salient point and formation method thereof

Abstract

The invention discloses a salient point and a formation method thereof, wherein the formation method of the salient point comprises: providing a semiconductor substrate, wherein the semiconductor substrate is provided with a metal cushion layer and a passivation layer, and the metal cushion layer is inlaid in the passivation layer and is exposed through an opening on the passivation layer; forming a metal shielding layer on the metal cushion layer in the opening of the passivation layer and the passivation layer; forming a photoresist layer on the metal shielding layer, wherein the photoresist layer is provided with an opening corresponding to the metal cushion layer; forming a seed crystal layer and a salient point lower metal layer on the metal shielding layer in the opening of the photoresist layer; etching out the metal shielding layer outside the metal cushion layer after the photoresist layer is removed; forming side walls at both sides of the metal shielding layer, the the both sides of the seed crystal layer and the both sides of the salient point lower metal layer; forming at least one stanniferous metal lead on the salient point lower metal layer; and refluxing the stanniferous metal lead, thus forming the salient point. In the invention, the bridging situation between the salient points is solved, and the occurrence of short circuit phenomena is avoided.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor devices, in particular to a bump and a method for forming the same. Background technique [0002] With the continuous development of integrated circuit technology, electronic products are increasingly developing in the direction of miniaturization, intelligence, high performance and high reliability. The integrated circuit packaging not only directly affects the performance of integrated circuits, electronic modules and even the whole machine, but also restricts the miniaturization, low cost and reliability of the entire electronic system. With the gradual reduction of the size of the integrated circuit chip and the continuous improvement of the integration level, the electronic industry has put forward higher and higher requirements for the integrated circuit packaging technology. [0003] Flip chip (flip chip) technology is through the solder balls formed on the surface of the chip, s...

AI Technical Summary

Problems solved by technology

[0007] As the integration of semiconductor devices becomes higher and higher, the distance between the bumps becomes smaller and smaller. In order to maintain the mechanical strength of the bumps, the height of the bumps must be increased within a limited area; During the pointing process, after the reflow process, due to the physical properties of metal melting, the volume of the bumps will become larger and expand laterally, which may cause bridging between the bumps, which will lead to short circuits and affect the electrical performance of semiconductor devices.

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