Method for manufacturing 6-inch POWERMOS transistor epitaxial layer
A manufacturing method and epitaxial layer technology, which are applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of reducing the effective thickness of the epitaxial layer, decreasing the yield of the device, and poor uniformity, so as to suppress the self-doping phenomenon. , Consistency improvement, the effect of improving electrical performance and yield
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[0026] A kind of manufacturing method of 6 inches POWERMOS tube epitaxial layer is characterized in that: carry out according to the following steps:
[0027] 1) Select a suitable POWERMOS tube substrate 1 and perform certain pre-treatments;
[0028] 2) Perform HCL vapor phase corrosion on the substrate at a certain temperature;
[0029] 3) Perform the first H 2 Variable speed purge;
[0030] 4) Deposit a layer of non-doped intrinsic layer 2 with a thickness of 1-2 microns on the substrate;
[0031] 5) Perform the second H 2 Variable speed purge;
[0032] 6) Forming the second epitaxial layer 3 on the intrinsic layer.
[0033] The equipment used in the present invention is the PE-2061S epitaxial furnace produced in Italy, which is heated by high-frequency induction. The base is high-purity graphite whose surface is cracked and coated with a layer of high-purity SiC.
[0034] Reaction chamber, substrate cleaning and treatment of graphite base: When the reaction chamber is...
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