Three-step variable-temperature diffusion process for silicon cell

Abstract

The invention relates to a three-step variable-temperature diffusion process for a silicon cell, which is realized by the following procedures: placing a silicon chip after etching into a boat, then rising the temperature to be 700-810 DEG C, and introducing large nitrogen, small nitrogen and oxygen to conduct low-temperature pre-deposition diffusion; subsequently rising the temperature to be 810-830 DEG C, and introducing large nitrogen to conduct knot thrusting; and then introducing large nitrogen, small nitrogen and oxygen, and rising the furnace temperature to be 830-870 DEG C to conduct secondary deposition diffusion. A multi-level PN knot structure formed after diffusion can ensure good ohmic contact with a metal gate wire on the one hand, and can have good blue response on the other hand; in addition, a PN knot formed by the method has great knot depth, and the possibility that the PN knot is burnt through, subjected to leakage of electricity and composited can be reduced.

Description

Technical field: [0001] The invention relates to a crystalline silicon solar cell, in particular to a three-step temperature-variable diffusion process for the crystalline silicon cell. Background technique: [0002] Diffusion-made PN junction is a core process in the production of crystalline silicon cells. The performance of the PN junction has a great influence on the photoelectric conversion efficiency of the cell and the long-term service quality of the cell. Therefore, in order to obtain high photoelectric conversion efficiency and good quality, it is necessary to prepare a stable and uniform PN junction with excellent performance. [0003] In order to improve the conversion efficiency of crystalline silicon solar cells, the current production method of PN junctions in general enterprises is a shallow junction high square resistance process. However, the shallow junction high square resistance process has three fatal defects: one is high square resistance, and the ohm...

AI Technical Summary

Problems solved by technology

However, the shallow junction high square resistance process has three fatal defects: one is high square resistance, and the ohmic contact between the positive silver grid line and the silicon substrate is poor, resulting in excessive series resistance, which seriously reduces the fill factor and conversion efficiency; the other is high square resistance. The square resistance uniformity of the resistance process is not easy to control, and the unevenness between the chips in the chip is very large, which seriously affects the stability of the PN junction; the third is that the junction is shallow, and the silver particles are easy to enter the junction area during sintering, causing leakage and recombination. Cell efficiency prone to fluctuations and stratification

[0004] In addition, most of the current diffusion processes for industrial production of crystalline silicon solar cells use a constant temperature diffusion process, and the performance of the PN junction has not been maximized, and the open circuit voltage and short circuit current of the battery are relatively low.

Patent CN101707226A discloses a diffusion process for crystalline silicon solar cells. This process is actually a two-step high-temperature diffusion process. It only considers the influence of the diffusion process on the uniformity of the resistance, thereby affecting the efficiency of the cell.

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