Terminal protection structure of super junction device and manufacturing method of terminal protection structure
A terminal protection structure, super junction technology, applied in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor devices, etc., can solve different problems
Active Publication Date: 2013-09-11
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Problems solved by technology
[0003] For existing devices such as high-voltage VDMOS, there are diffusion guard ring technologies and field plate technologies such as floating field plate technology, resistive field plate technology, equipotential ring technology, field limiting ring technology, junction terminal extension technology, etc.; but for super Junction devices, because the withstand voltage of the device unit is very different from that of the traditional VDMOS, the corresponding high-reliability terminal protection structure needs to be designed separately
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[0063] Such as figure 1 Shown is a top view of the terminal protection structure of the super junction device of the embodiment of the present invention Figure one . In the top view, the embodiment of the present invention can be divided into zone 1, zone 2, and zone 3. Region 1 is the middle region of the super junction device is the current flow region, the current flow region includes alternately arranged P-type regions 25 and N-type regions formed in the N-type silicon epitaxial layer; in the current flow region It passes through the N-type region from the source to the drain through the channel, and the P-type region 25 is in a reverse cut-off state and forms a depletion region with the N-type region to withstand voltage. Zone 2 and Zone 3 are the terminal protection structure area of the super junction device. When the device is turned on, the terminal protection structure does not provide current. In the reverse cut-off state, it is used to take over from the outer pe...
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The invention discloses a terminal protection structure of a super junction device, which adopts a combined structure of a polycrystalline silicon field plate and a metal field plate. One polycrystalline silicon field plate covers a footstep structure of a terminal medium membrane and the polycrystalline silicon field plate is further covered by two medium layers with different thicknesses, so that an electric field on the surface of the device can be alleviated. In the invention, a P-type ring with a higher concentration is kept under the field plate so that a current processing capability of the device is improved when the device is used in an inductive circuit. According to the invention, the structure configuration of a P-type column and an N-type column in the terminal protection structure can assure that the device is turned off when the device is applied to the inductive circuit and the position of generating avalanche-like breakdown in the terminal protection structure is ensured to be close to the front side of a silicon sheet when a current overshoot happens, so that the capability of resisting the overshoot current is improved. The invention further discloses the terminal protection structure of the super junction device and a manufacturing method of the terminal protection structure. According to the terminal protection structure of the super junction device, provided by the invention, the voltage endurance, the current processing capability and the reliability of the device can be improved and the process cost is not increased.
Description
Technical field [0001] The invention relates to the field of semiconductor integrated circuit manufacturing, in particular to a terminal protection structure of a super junction device; the invention also relates to a method for manufacturing a terminal protection structure of a super junction device. Background technique [0002] Super junction MOSFET adopts a new withstand voltage layer structure, using a series of alternately arranged P-type semiconductor thin layers and N-type semiconductor thin layers to combine the P-type semiconductor thin layers and N-type semiconductor thin layers at a lower voltage in the off state. Type semiconductor thin layer is depleted to achieve mutual compensation of charges, so that P-type semiconductor thin layer and N-type semiconductor thin layer can achieve high breakdown voltage under high doping concentration, thereby achieving low on-resistance and high breakdown at the same time Voltage, breaking the theoretical limit of traditional powe...
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IPC IPC(8): H01L29/06H01L27/02H01L21/336H01L21/82
Inventor 肖胜安
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP