241results about How to "Improve withstand voltage characteristics" patented technology

An organic light emitting display device, including: a first substrate on which a plurality of light emitting elements are formed; a second substrate that is disposed to be opposed to the first substrate; a primary dam member that is provided between the first substrate and the second substrate in order to surround the plurality of light emitting elements; a filler that is filled between the first substrate and the second substrate and in a first region defined by the primary dam member, an auxiliary dam member that is between the first substrate and the second substrate and in a second region outside the first region, and is made of porous material; and an inorganic sealant that is provided between the first substrate and the second substrate and in a third region outside the first region and the second region, and is jointed to the first substrate and the second substrate.

Capacitance element electrodes (E1 to E5) and a grounded reference electrode (E0) are formed on a substrate (20). At a position opposite to these electrodes (E0 to E5), a displacement electrode (40) is disposed that is Z-axially deformable as a detective member (30) is externally operated to move Z-axially. The displacement electrode (40) cooperates with the reference electrode (E0) and capacitance element electrodes (E1 to E5) to form capacitance elements (C0 to C5), respectively. Each of the capacitance elements (C1 to C5) is connected in series with the capacitance element (C0) with respect to a signal externally input. Changes in the capacitance values of the capacitance elements (C1 to C5) as the detective member (30) is moved are detected to sense the displacement of the detective member (30).

The present invention provides a ceramic circuit board comprising: a ceramic substrate and a metal circuit portion bonded to at least one main surface of the ceramic substrate; wherein each of ratios of Ra1 / Ra2 and Ra2 / Ra1 is 1.5 or less in which a surface roughness in terms of arithmetical average surface roughness Ra in arbitral one direction of the ceramic substrate is Ra1 while a surface roughness Ra in a direction normal to the one direction of the ceramic substrate is Ra2, and a breakdown voltage of the ceramic substrate is 20 kV / mm or more. According to the above structure of the present invention, there can be provided a ceramic circuit board having an excellent heat-cycle resistance and bending strength characteristics without impairing a heat radiating property, and capable of increasing an operating reliability as electronic device.

The present invention discloses a transversal bilateral diffusion MOS transistor with high pressure resistant, which belongs to micro-electronics semi-conductor device field. The device includes a gate region, a source area, a drain region, a tagma, a gate medium and a drift region, the setting drift region is placed between the tagma and the drain region, and the doping type is opposite to the tagma, an insulating medium region and a doping region which is opposite to the doping type of the drift region are equipped in the drift region, and the doping concentration of the doping region is higher than that of the drift region, the doping region is adjacent to the tagma, however the insulating medium region is adjacent to the drain region. Because the insulating medium region and the doping region are inducted into the drift region at the same time, the effective depth of the drift region is reduced effectively to make the electric field more uniform and increase the equivalent length of the drift region, the resistant high Voltage characteristic of the transversal bilateral diffusion MOS transistor device of the present invention is good.

A nitride semiconductor device of the present invention includes: a nitride semiconductor laminated structure including an n-type first layer, a second layer that is laminated on the first layer and contains a p-type impurity, and an n-type third layer laminated on the second layer, each layer of the nitride semiconductor laminated structure being made of a Group III nitride semiconductor, and having a wall surface extending from the first, second, to third layers; a fourth layer that is formed on the wall surface in the second layer and that has a different conductive characteristic from that of the second layer; a gate insulating film formed to contact the fourth layer; and a gate electrode formed as facing the fourth layer with the gate insulating film being sandwiched between the gate electrode and the fourth layer.

An alumina-based ceramic composition comprising a composite sintered body of alumina as a main component and a composition of at least one element selected from Al, Si, Mg and rare earth elements, wherein an amount of the composition of at least one element selected from Al, Si, Mg and the rare earth elements is not greater than 5 parts by weight on the basis of 100 parts by weight of alumina as the main component, and a spark plug using this alumina-based ceramic composition for an insulator.

Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heterostructure field effect transistor (HFET) or a Schottky diode, arranged on a heat dissipation substrate. The HFET device may include a GaN-based multi-layer having a recess region; a gate arranged in the recess region; and a source and a drain that are arranged on portions of the GaN-based multi-layer at two opposite sides of the gate (or the recess region). The gate, the source, and the drain may be attached to the heat dissipation substrate. The recess region may have a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.

To dispose a back gate electrode forced to have a low resistance under a semiconductor layer to form thereon field effect transistors, while preventing the degradation of the crystal quality of the semiconductor layer to form thereon the field effect transistors. With respect to a semiconductor device, a buried oxide film 12 is formed on a single-crystal semiconductor substrate 11, and a first single-crystal semiconductor layer 13 constituting a back gate electrode is formed on the buried oxide film 12. Further, a buried oxide film 14 is formed on the first semiconductor layer 13, and second single-crystal semiconductor layers 15a, 15b subjected to a mesa-isolation are laminated on the buried oxide film 14. The film thicknesses of the second semiconductor layers 15a, 15b are made larger than that of the first semiconductor layer 13, and SOI transistors are formed respectively on the second semiconductor layers 15a, 15b.

To provide a circuit device having both of high heat releasing property and high breakdown voltage, and a method of manufacturing the same. A first insulating layer is formed on a front surface of a circuit board, and a second insulating layer is formed on a rear surface thereof. Conductive patterns are formed on a surface of the first insulating layer and are fixed to circuit elements. Furthermore, a metal board is stuck to a surface of the second insulating layer. A sealing resin covers front and side surfaces of the circuit board and additionally covers peripheral portions of the rear surface of the circuit board in a manner that the rear surface of the metal board is exposed. Thus, a heat releasing property and a withstand voltage property of the circuit board are ensured.

In a semiconductor device of the present invention, an N type epitaxial layer is formed on a P type single crystal silicon substrate. The substrate and the epitaxial layer are partitioned into a plurality of element formation regions by isolation regions. Each of the isolation regions is formed of a P type buried diffusion layer and a P type diffusion layer coupled thereto. The P type buried diffusion layer is joined to N type buried diffusion layers on both sides thereof to form PN junction regions. On the other hand, the P type diffusion layer is joined to N type diffusion layers on both sides thereof to form PN junction regions. This structure suppresses extension of widthwise diffusion of the P type buried diffusion layer and the P type diffusion layer, thus making it possible to reduce the device size.

In a conventional semiconductor device, there has been a problem that, in a region where a wiring layer to which a high electric potential is applied traverses a top surface of an isolation region, the withstand voltage is deteriorated. In a semiconductor device of the present invention, an epitaxial layer is deposited on a substrate, and an LDMOSFET is formed in one region divided by an isolation region. In a region where a wiring layer connected to a drain electrode traverses a top surface of the isolation region, a conductive plate having a ground electric potential and another conductive plate in a floating state are formed under the wiring layer. With this structure, electric field is reduced in the vicinity of the isolation region under the wiring layer, whereby a withstand voltage of the LDMOSFET is increased.

A nanometer ceramic material dopant, medium material of ceramic capacitor and their production are disclosed. The formula of the dopant consists of aA.bB.cC.dR2 O3.eSiO2; A contains Na2O; B contains one or multiple of MgO and CaO; C contains one or multiple of MnO2 and Co3O4; R contains one of multiple of Y, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, among them a, b, c, d and e are coefficient, by computing mol%, 0<=a<=10%, 0<=b<=25%, 0<=c<=15%, 20%<=d<=60%, 10%<=e<=50% and b and c can't be zero at same time. Its advantages include large capacity, adjustable material formula, low sintering temperature, less medium loss, high dielectric constant and better reliability.

The invention discloses a cold cathode electron source array with an external grid, which solves the problems of poor precision, poor device pressure resistance, poor stability, complicated technology and the like of the existing technology. The cold cathode electron source array with the external grid comprises a cold cathode array fixed support (2) and a plurality of cathode emission units (3), wherein a plurality of fixing holes having the same number as the cathode emission units (3) are formed in the upper end face of the cold cathode array fixed support (2); the cathode emission units (3) are inserted and fixed into the holes in the upper end face of the cold cathode array fixed support in a one-to-one correspondence manner. The cold cathode electron source array with the external grid has the advantages of simple process, high precision, good consistency and the like, capability of improving the yield of components in processing and convenience for massive integration, and furthermore, a single cathode emission unit is independent, so that the damaged or bad cathode emission unit in an electronic gun can be replaced at any time, and thus the cost is reduced.

A high withstand voltage insulating substance is formed between a radiation sensitive type amorphous semiconductor thick film suitable for forming a large area and an end edge portion of a voltage application electrode. As a result, concentration of an electric field on the end edge portion of the voltage application electrode is eliminated and a prestage phenomenon of penetration discharge or discharge breakdown is not caused.

There is provided a multilayer ceramic electronic component, including: a ceramic main body including a dielectric layer; and first and second internal electrodes provided on upper and lower surfaces of the dielectric layer and formed of a thin film including graphene. The multilayer ceramic electronic component includes internal electrodes formed of a thin film including graphene, thereby having increased capacitance and improved thermal stability and withstand voltage characteristics.

This invention has an object to provide a spark plug exhibiting high withstand voltage characteristics and high strength at high temperature, formed by an alumina-based sintered body prepared with excellent processability and high productivity, and a method for manufacturing the spark plug. This invention relates to a spark plug 1 including an insulator 3, wherein the insulator 3 includes a dense alumina-based sintered body having an average crystal particle diameter of 1.50 μm or more, and the alumina-based sintered body contains Si, a Group 2 element component containing Ba and a Group 2 element other than those, and a rare earth element component, such that a ratio of a content S of the Si component to a total content of the content S and a content A of the Group 2 element component is 0.60 or more, and a method for manufacturing the spark plug 1 prepared through a grinding-shaping process in which the insulator 3 is ground before burning to shape the same.

Gallium nitride (GaN) based semiconductor devices and methods of manufacturing the same. The GaN-based semiconductor device may include a heat dissipation substrate (that is, a thermal conductive substrate); a GaN-based multi-layer arranged on the heat dissipation substrate and having N-face polarity; and a heterostructure field effect transistor (HFET) or a Schottky electrode arranged on the GaN-based multi-layer. The HFET device may include a gate having a double recess structure. While such a GaN-based semiconductor device is being manufactured, a wafer bonding process and a laser lift-off process may be used.

The invention discloses a method for preventing the short-circuit failure of a high-voltage aluminum-electrolyzing capacitor for a switching power supply, which comprises an optimizing step for an aging working procedure and a step for improving the flash-fire voltage of an electrolyte, wherein the optimizing step for the aging working procedure comprises the following substeps of: in the aging process of a product, aging by adopting a segmented voltage-raising mode, prolonging the aging time step by step after entering a high-voltage stage, and raising the highest aging voltage to be 1.5 times of the working voltage of the capacitor to improve the strength of continuously restoring a dielectric film by the electrolyte; and the step for improving the flash-fire voltage of the electrolyte comprises the following substeps of: adopting a non-water-system electrolyte to decrease the concentration of hydroxyl ions and reduce the generation of oxygen-ion discharge. By optimizing an aging process, the insulating performance of the dielectric film is improved, and the pressure-resisting characteristic of the product is improved; by optimizing electrolyte components, the flash-fire voltage of the electrolyte is improved, and flash-fire breakdown is prevented from occurring when the voltage is excessive; and by optimizing electrolytic paper, the short circuit of the product due to the breakage of the electrolytic paper is prevented.

The method for forming a nitride semiconductor laminated structure according to the present invention includes: a first layer forming step of forming an n-type or i-type first layer composed of a group III nitride semiconductor; a second layer forming step of laminating a p-type second layer composed of a group III nitride semiconductor and containing Mg on the first layer; and a third layer forming step of forming an n-type or i-type third layer composed of a group III nitride semiconductor on the second layer after the second layer forming step.

The invention discloses a composite soft magnetic material and a preparation method thereof. The composite soft magnetic material comprises the following components in percentage by mass: 82.56 to 98.45 percent of FeSiCr, 0.3 to 8.9 percent of Fe2O3, 0.1 to 1.93 percent of NiO, 0.1 to 2.13 percent of ZnO and 0.1 to 0.53 percent of CuO. The preparation method of the composite soft magnetic material comprises mixing, pre-burning, smashing, pressing and sintering. The saturation flux density of the composite soft magnetic material is adjusted by adjusting the content of FeSiCr, and the content of generated NiCuZn ferrite is adjusted by adjusting the content of Fe2O3, NiO, ZnO and CuO, so that the insulation and pressure-resistant property of the composite soft magnetic material are enhanced.

The invention relates to a multistreaming high-precision rotary ring type flow sensor which comprises a flow meter shell, a flow meter top cover, an upper impeller shell component, an impeller component, a lower impeller shell component, a filter screen, a diversion component, an external measuring room and an inner measuring room, wherein a fluid flows into from the water inlet of the flow meter shell, changes direction along the slope of the diversion component to flow upwards, then flows through the fan-shaped hole of the filter screen to the external measuring room, enters into the wedge-shaped water inlet of the upper impeller shell component along the diagonal line direction, enters into the inner measuring room through the wedge-shaped water inlet, and forms multiple streams so as to uniformly push the impeller component to rotate; and at the same time, the fluid changes the movement direction to move downwards into the center hole of the filter screen, then flows out from the water outlet of the flow meter shell through the center hole of the diversion component. In the invention, the multistreaming principle is utilized, so that the momentary rotation speed of an impeller can correspond to the momentary flow speed of the fluid flowing through the measuring rooms more truly, and the flow characteristic of a flow meter is improved, and the flow measurement accuracy, repeatability and reproducibility and stability are improved.

The invention provides a light-emitting shift register, a light-emitting control method, a driving circuit and a display device, aiming to simplify circuit structures and improve circuit stability. The light-emitting shift register comprises a first processing module, a second processing module and an output module. The first processing module is used for controlling signals of a first node according to signals of an input signal terminal, a first clock signal terminal and a second clock signal terminal. The second processing module comprises a first transistor and a second transistor. The first transistor is a dual-grid transistor. The first end of the second transistor is connected with a pulse signal terminal electrically. The second end of the second transistor is connected with a second node electrically. The output module is used for controlling signals of an output signal terminal according to signals of a first level signal terminal, a second level signal terminal, the first node and the second node.

In a wide gap semiconductor device of SiC or the like used at a temperature of 150 degrees centigrade or higher, the insulation characteristic of a wide gap semiconductor element is improved and a high-voltage resistance is achieved. For these purposes, a synthetic high-molecular compound, with which the outer surface of the wide gap semiconductor element is coated, is formed in a three-dimensional steric structure which is formed by linking together organosilicon polymers C with covalent bonds resulting from addition reaction. The organosilicon polymers C have been formed by linking at least one organosilicon polymers A having a crosslinked structure using siloxane (Si—O—Si combination) with at least one organosilicon polymers B having a linear linked structure using siloxane through siloxane bonds.

The invention discloses a Schottky diode and a manufacturing method thereof. The Schottky diode comprises a substrate, a buffer layer, an extension structure, a Schottky contact metal and an Ohmic contact metal, wherein the substrate the buffer layer and the extension structure are sequentially arranged in an overlapped structure; the extension structure comprises a super bonding layer, a GaN channel layer and a barrier layer which are sequentially stacked, and the super bonding layer is composed of a plurality of p-type GaN layer and a plurality of n-type GaN layer which are alternately stacked each other; the Schottky contact metal and the Ohmic contact metal are symmetrically arranged on the opposite two side surfaces of the extension structure, one ends of the Schottky contact metal and the Ohmic contact metal extend to the upper surface of the extension structure, and the other ends of the Schottky contact metal and the Ohmic contact metal extend to the buffer layer. The Schottky diode has relatively high pressure resistance, ensures current transmission capacity and stability and avoids a traditional field plate structure or protecting ring structure, thereby simplifying the manufacturing process and reducing the cost.

The invention discloses a terminal protection structure of a super junction device, which adopts a combined structure of a polycrystalline silicon field plate and a metal field plate. One polycrystalline silicon field plate covers a footstep structure of a terminal medium membrane and the polycrystalline silicon field plate is further covered by two medium layers with different thicknesses, so that an electric field on the surface of the device can be alleviated. In the invention, a P-type ring with a higher concentration is kept under the field plate so that a current processing capability of the device is improved when the device is used in an inductive circuit. According to the invention, the structure configuration of a P-type column and an N-type column in the terminal protection structure can assure that the device is turned off when the device is applied to the inductive circuit and the position of generating avalanche-like breakdown in the terminal protection structure is ensured to be close to the front side of a silicon sheet when a current overshoot happens, so that the capability of resisting the overshoot current is improved. The invention further discloses the terminal protection structure of the super junction device and a manufacturing method of the terminal protection structure. According to the terminal protection structure of the super junction device, provided by the invention, the voltage endurance, the current processing capability and the reliability of the device can be improved and the process cost is not increased.

Provided are: an electrolytic capacitor having high withstand voltage, wherein deterioration of the withstand voltage characteristics due to lead-free reflow or the like can be prevented and the ESR characteristics can be improved; and a method for manufacturing the electrolytic capacitor. This electrolytic capacitor is obtained by: forming a solid electrolyte layer that contains 60-92 wt% of sorbitol or sorbitol and a polyhydric alcohol by impregnating a capacitor element, which is obtained by winding up a positive electrode foil and a negative electrode foil with a separator being interposed therebetween, with a dispersion that contains particles of a conductive polymer, sorbitol or sorbitol and a polyhydric alcohol, and a solvent; and filling pores in the capacitor element, which has been provided with the solid electrolyte layer, with an electrolyte solution that contains ethylene glycol.

A ZnO varistor powder can be obtained with high operating voltage and excellent current-voltage nonlinear resistance characteristics. In the ZnO varistor powder, the main ingredient is zinc oxide (ZnO); and at least bismuth (Bi), cobalt (Co), manganese (Mn), antimony (Sb), nickel (Ni), and aluminum (Al), calculated as Bi2O3, CO2O3, MnO, Sb2O3, NiO, and Al3+, are contained as accessory ingredients in amounts of 0.3 to 1.5 mol % Bi2O3, 0.3 to 2.0 mol % Co2O3, 0.3 to 3 mol % MnO, 0.5 to 4 mol % Sb2O3, 0.5 to 4 mol % NiO, and 0.0005 to 0.02 mol % Al3+. ZnO content is greater than or equal to 90 mol %; the bulk density is greater than or equal to 2.5 g / cc; the powder is a spherical powder in which the 50% particle diameter in the particle size distribution is 20 μm to 120 μm.

The invention provides a high-thermal conductivity resin cured product, a resin film and a resin composition with cured production with excellent thermal conductivity and voltage resistance. The high-thermal conductivity resin cured product comprises resin material of (A) component and filler of (B) component. The filler of the (B) component, with respect to its total mass, comprises: i) by mass, 15%-25% of small-grain size filler with the average grain size D50 ranging from 0.1 [mu]m to less than 1.0 [mu]m; ii) by mass, 15%-25% of middle-grain size filler with the average grain size D50 ranging from 3 [mu]m-20[mu]m; and iii) by mass, 50%-70% of large-grain size filler with the average grain size D50 ranging from 30 [mu]m-60[mu]m. Moreover, the greatest grain size of the filler is in the range of 30% to 70% with respect to the film thickness of the cured product, the average grain size of the large-grain size filler is in the range of 18% to 35% with respect to the film thickness of the cured product, and the content of the filler is in the range of 70vo1% to 90vol% of the integral composition.

A light emission device including an electron discharger including a first substrate, a plurality of cathode electrodes, a plurality of electron emission regions, and a plurality of gate electrodes, the first substrate having a plurality of recessed portions at a first surface of the first substrate, the cathode electrodes extending along a first direction and in the recessed portions, the electron emission regions on the cathode electrodes, and the gate electrodes extending along a second direction crossing the first direction; a light emitter including a second substrate, the second substrate having a second surface facing the first surface of the first substrate with a gap therebetween; and a plurality of fixing blocks on the first substrate and between the gate electrodes, the fixing blocks being separated from the light emitter.