Thin film transistor array substrate
A thin-film transistor and array substrate technology, which is applied in the field of thin-film transistor array substrates, can solve the problems of unfavorable production capacity increase, process time increase, multiple laser irradiation times, etc., and achieve the effect of good component characteristics and high carrier mobility
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no. 1 example
[0061] Figure 1A is a schematic diagram of a thin film transistor array substrate according to an embodiment of the present invention, and Figure 1B for Figure 1A Schematic cross-section along section lines AA, BB and CC. Please also refer to Figure 1A and Figure 1B , the thin film transistor array substrate 200 includes a substrate 210, a plurality of polysilicon islands 220 disposed on the substrate 210, and a plurality of gates 230, wherein the substrate 210 is mainly divided into a display area 210D, a gate driving area 210G, and a source driving area 210S, and the polysilicon island 220 includes a plurality of first polysilicon islands 220A and a plurality of second polysilicon islands 220B, the first polysilicon islands 220A are disposed in the display area 210D and the gate driving area 210G, and the second The polysilicon island 220B is disposed in the source driving region 210S.
[0062] Please continue to refer to Figure 1B Each polysilicon island 220A, 220B...
no. 2 example
[0082] Figure 5A is the thin film transistor array substrate of the second embodiment of the present invention along Figure 1A The cross-sectional schematic diagram of the AA, BB, CC section lines. Please refer to Figure 5A , to simplify the description, the above-mentioned components similar to those described above will not be described again. Compared with the previous embodiments, the second polysilicon island 320B of the thin film transistor array substrate 300 of this embodiment has a main grain boundary MGB and a secondary grain boundary SGB, and the main grain boundary MGB of the second polysilicon island 320B is only located In the source region 222 and / or the drain region 224 , in other words, there is no main grain boundary MGB in the channel region 226 of the second polysilicon island 320B. The formation positions of the main grain boundary MGB and the secondary grain boundary SGB of the second polysilicon island 320B can be controlled, for example, by adjusti...
no. 3 example
[0086] Figure 6A is the thin film transistor array substrate of the third embodiment of the present invention along Figure 1A The cross-sectional schematic diagram of the AA, BB, CC section lines. Please refer to Figure 6A , to simplify the description, the above-mentioned components similar to those described above will not be described again. Compared with the second embodiment, the main grain boundary MGB of the second polysilicon island 420B of the thin film transistor array substrate 400 of this embodiment is only located in the source region 222 and / or the drain region 224, in other words, the second most There is no main grain boundary MGB in the channel region 226 of the silicon island 420B. Moreover, in this embodiment, the grain size in the second polysilicon island 420B of the thin film transistor array substrate 400 is substantially smaller than the grain size in the first polysilicon film.
[0087] Figure 6B It is a diagram showing the crystal grain arrang...
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