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Method for improving reading redundancy of static random access memory

A technology of static randomness and redundancy, applied in the field of microelectronics, can solve the problems of reducing the equivalent resistance of the control tube and affecting the readout redundancy of the random access memory, so as to improve the readout redundancy, reduce the potential, increase The effect of large equivalent resistance

Inactive Publication Date: 2012-09-05
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

[0008] However, in the traditional SMT process, when performing photolithography on the PMOS device, the silicon nitride film covering the surface of the control tube device is not etched. Therefore, compressive stress will be generated on the control tube device, which improves the control. The carrier mobility of the tube reduces the equivalent resistance of the control tube and affects the readout redundancy of the random access memory.

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  • Method for improving reading redundancy of static random access memory
  • Method for improving reading redundancy of static random access memory
  • Method for improving reading redundancy of static random access memory

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Embodiment Construction

[0028] The present invention will be further described below in combination with principle diagrams and specific operation examples.

[0029] see Figure 4 Shown, a kind of method of improving SRAM read redundancy of the present invention, specifically comprises the following steps:

[0030] Step S1: performing shallow trench isolation (STI) on the silicon substrate to form shallow trench isolation;

[0031] Step S2: Implanting well ions on the silicon substrate to form a well bottom;

[0032] In this step, according to the different types of semiconductor devices to be formed, the formed wells are also different. For example, to manufacture a PMOS type device, it is necessary to implant boron ions into the silicon substrate to form an N well. NMOS type devices need to implant phosphorus ions into the silicon substrate to form a P well.

[0033] Step S3: performing polysilicon gate fabrication, sidewall formation, and source and drain implantation on the silicon substrate; ...

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Abstract

The invention discloses a method for improving the reading redundancy of a static random access memory. The method comprises the following steps of: providing a semiconductor substrate comprising an NMOS (N-channel metal oxide semiconductor) transistor, a PMOS (P-channel metal oxide semiconductor) transistor and a control tube; depositing a nitride film layer on the surface of a semiconductor device; and carrying out photolithography technique on the nitride film layers on the surfaces of the PMOS transistor and the control tube to remove the nitride film layers. According to the invention, the equivalent resistor of the control tube is increased while the existing process steps are not added so as to reduce the potential of a node inside the static random access memory during the reading process, thereby improving the reading redundancy of the random access memory.

Description

technical field [0001] The invention relates to the field of microelectronics, in particular to a method for improving the readout redundancy of a static random access memory. Background technique [0002] Static random access memory (SRAM), as an important product in semiconductor memory, has been widely used in high-speed data exchange systems such as computers, communications, and multimedia. [0003] Such as figure 1 as shown in figure 1 It is a layout structure of a common SRAM cell below 90 nanometers, including three levels of active regions, polysilicon gates, and contact holes. The area 1 marked in the figure is the control transistor (Pass Gate), which is an NMOS device, and the area 21 is marked as the pull-down transistor (Pull Down MOS), which is also an NMOS device, and the area 22 is marked The one that comes out is the pull-up tube (Pull Up MOS), and the device is a PMOS device. [0004] Readout redundancy is an important parameter to measure the readout ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8244H10B10/00
Inventor 俞柳江
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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