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63results about How to "Increase the equivalent resistance" patented technology

Method for suppressing vehicle network low-frequency oscillation and system thereof

The invention discloses a method for suppressing vehicle network low-frequency oscillation and a system thereof. The method comprises the steps that a network side voltage instantaneous value, a network side current instantaneous value, DC side output voltage, DC side output current, a DC side output voltage given value, a network side filtering inductance value and a network side equivalent resistance value are acquired; a first initial modulation signal is obtained according to the network side voltage instantaneous value, the DC side output voltage, the DC side output voltage given value, the network side filtering inductance value and the network side equivalent resistance value; a second initial modulation signal is obtained according to the network side current instantaneous value, the resistance value of a preset virtual resistor and the network side voltage phase obtained according to the network side voltage instantaneous value; and difference processing is performed on the first initial modulation signal and the second initial modulation signal so that a difference value is obtained, and the difference value acts as an output PWM signal to the modulation signal of the PWM generator of a network side rectifier. The low-frequency oscillation of the vehicle network system can be effectively suppressed so that the stability of the vehicle network system can be enhanced without increasing hardware cost.
Owner:CSR ZHUZHOU ELECTRIC LOCOMOTIVE RES INST

Static discharge clamping circuit with bias circuit in 90 nanometer CMOS (complementary metal-oxide-semiconductor transistor) process

ActiveCN103400827AReduce static leakageReduce source-gate voltageSemiconductor/solid-state device detailsSolid-state devicesNanometer cmosResistance capacitance
The invention discloses a static discharge clamping circuit with a bias circuit in a 90 nanometer CMOS (complementary metal-oxide-semiconductor transistor) process. The static discharge clamping circuit mainly solves the problem of great RC (resistance-capacitance) network static electricity leakage in the static discharge clamping circuit in the existing 90 nanometer CMOS process. The circuit comprises an RC network, a phase inverter, a clamping device and a bias circuit, wherein the bias circuit provides bias voltage Vb of a grid electrode for a PMOS (P-channel metal oxide semiconductor) tube Mp3 in the RC network, as the bias voltage Vb is high voltage, the source grid voltage of the PMOS tube Mp3 is reduced, the equivalent resistance is increased, and the static electricity leakage of the RC network is reduced; during the static discharge, after the bias RC network detects the static discharge, the detection voltage CLK is input into the phase inverter, after the phase inverter receives the detection voltage, the grid electrode driving voltage Vg is input into the clamping device for starting the clamping device, and the static discharge charges are discharged. The static discharge clamping circuit has the advantages that the energy efficiency of the static discharge clamping circuit in the 90 nanometer CMOS process is improved, and the static discharge clamping circuit can be used for the design of integrated circuits.
Owner:XIDIAN UNIV

LC filter elevator energy feedback device

The invention relates to an LC filter elevator energy feedback device which comprises a three-phase uncontrollable rectifier module, a direct-current bus side capacitor, a three-phase full-bridge controllable inverter module and an elevator traction machine, wherein the three-phase uncontrollable rectifier module, the direct-current bus side capacitor, the three-phase full-bridge controllable inverter module and the elevator traction machine are sequentially connected. The three-phase full-bridge controllable inverter module is connected with a three-phase power grid through a grid -connected inverter at the same time. The device is characterized in that an LC filter, an isolating diode and a voltage stabilizing capacitor are further included, the LC filter is connected between the output end of the grid-connected inverter and the three-phase power grid, the voltage stabilizing capacitor is connected with the input end of the grid-connected inverter in parallel, the P electrode of the isolating diode is connected with the positive pole of the direct-current bus side capacitor, and the N electrode of the isolating diode is connected with the positive pole of the voltage stabilizing capacitor. According to the elevator energy feedback device, the characteristic that a low-power elevator system with the power of 7.5 KW or below has large circuit equivalent resistance is fully used, oscillation can be effectively prevented through network side equivalent resistance, grid-connected current high harmonics are filtered, extra loss is not generated, system stability is high, and social benefits and economic benefits are remarkable.
Owner:TIANJIN XINBAOLONG ELEVATOR GRP

UPFC fault transition device and method based on additional damping resistor

The invention discloses a UPFC fault transition device and method based on an additional damping resistor. The MMC-UPFC fault transition is realized through the series connection of an anti-parallel double-thyristor group at a DC positive bus and the addition of a damping module at an MMC bridge arm at a series side. When an alternating current system has a short-circuit fault, the fault current is coupled to the valve side through the series transformer and the series side MMC is locked, When the active power transmission direction between the UPFC normal operation converters is from the series side to the parallel side, the series side MMC damping module IGBT is locked, the damping resistor is inputted, the fault current of the series side MMC fed into the direct current bus is inhibited, and the parallel side MMC cannot be locked in an overcurrent mode; when the active power transmission direction between the UPFC normal operation converters is from the parallel side to the series side, the anti-parallel double-thyristor group automatically cuts off the reverse fault current of the DC bus, the MMC at the parallel side is isolated from the MMC at the series side, and the UPFC isswitched to the STATCOM mode, thereby providing reactive power support for the bus voltage of the system after the fault, and facilitating the safe operation of the power system after the fault.
Owner:NORTH CHINA ELECTRIC POWER UNIV (BAODING)

Water cooling structure of axial segmentation inner stator of outer rotor hub motor

The invention relates to the technical field of hub motors, in particular to a water cooling structure of an axial segmentation inner stator of an outer rotor hub motor. The structure comprises the axial segmentation inner stator, a radial radiation type waterway cooling disc, an axial connection cooling pipe, a stator bracket and a fastening pressure disc. According to the present invention, the stator adopts an axial segmentation structure, the radial radiation type waterway cooling discs are arranged between every two adjacent blocks, cooling water cools the segmented stator through the radial radiation type waterway cooling discs and the axial connection cooling pipes, waterways can make full contact with the wall face of a stator iron core, and heat dissipation is improved; the temperature rise of the stator iron core and the winding is low, so that the insulation aging acceleration and even motor burnout caused by too high temperature of the stator core and the winding are avoided, and an outer rotor permanent magnet synchronous hub motor works in a safe and efficient range. The stator core segmented structure can also significantly reduce the eddy current loss of the stator core and reduce the heat generation.
Owner:HARBIN UNIV OF SCI & TECH

Trench gate metal oxide field effect transistor and manufacturing method thereof

The invention relates to a trench gate metal oxide field effect transistor, which comprises a front metal electrode, a back metal electrode, an N-type single crystal substrate, an N-type epitaxial layer and a first P-type doping region, wherein a central part of the N-type epitaxial layer and a central part of the first P-type doping region are provided with a vertical trench, a first dielectric layer is arranged between the side wall of a grid electrode in the trench and the first P-type doping region, a second dielectric layer is arranged between the bottom of the grid electrode and the epitaxial layer, the first P-type doping region is provided with a first N-type doping region at the part close to the two sides of the trench, the first P-type doping region is further provided with a second P-type doping region at the part away from the two sides of the trench, the internal part of the epitaxial layer is further provided with a third P-type doping region and a second N-type doping region which are contacted with the lower part of the second dielectric layer, the third P-type doping region and the second N-type doping region are enabled to be mutually staggered and spaced, and a plurality of PN junction units are formed in the length direction and the thickness direction. According to the invention, parasitic capacitance between a grid electrode and a drain electrode of a low trench gate SiC MOSFET can be reduced, the electric field intensity at the bottom of the trench is reduced, and turn-on of a parasitic BJT (Bipolar Junction Transistor) is suppressed.
Owner:SHENZHEN BASIC SEMICON LTD

Method for improving writing-in redundancy rate of static random access memory

A method for improving the writing-in redundancy rate of a static random access memory comprises the first step of providing a silicon-based substrate and forming a shallow-channel isolator, the second step of forming an NMOS device and a PMOS device serving as an upwards-pull transistor, the third step of carrying out source-drain injection in source electrode areas and drain electrode areas of the NMOS device and the PMOS device serving as the upwards-pull transistor and depositing a silicon nitride protective layer, the fourth step of carrying out source-drain annealing process on the NMOS device and the PMOS device serving as the upwards-pull transistor, and the fifth step of etching and removing the silicon nitride protective layer. When a stress memory effect process photolithography mask is manufactured, the PMOS device area of the upwards-pull transistor and the NMOS device are covered; in the stress memory effect process, the upwards-pull transistor and the NMOS device are both covered with the silicon nitride protective layer, then the source-drain annealing process is carried out, the hole mobility of the upwards-pull transistor is reduced, and then the equivalent resistance of the upwards-pull transistor is increased; in the writing-in process, the electric potential of a second node is lowered and then the writing-in redundancy rate can be improved.
Owner:SHANGHAI HUALI MICROELECTRONICS CORP

Outer rotor water cooling structure of permanent magnet synchronous hub motor

The invention relates to the technical field of hub motors, in particular to an outer rotor water cooling structure of a permanent magnet synchronous hub motor, which comprises an outer rotor permanent magnet synchronous hub motor, an outer rotor waterway cooling pipe, a waterproof bearing and an axial flow impeller, the two ends of the outer rotor waterway cooling pipe are welded between the inner ring of the waterproof bearing and the surface of an axial-flow impeller shaft and are tightly attached to the periphery of motor permanent magnets and the inner wall of a rotor core through end covers. When the hub motor rotates, the outer rotor waterway cooling pipe and the axial flow impeller are driven to rotate, and cooling water enters the outer rotor waterway cooling pipe through the axial flow impeller to cool the permanent magnets. A rotor adopts water internal cooling, the temperature rise of the permanent magnets is low, the reduction of magnetic performance and irreversible demagnetization of the permanent magnets due to over-high temperature are avoided, and the motor is reliable in operation. The permanent magnet adopts an axial segmented structure, and omega-shaped coolingwater pipes are arranged between every two adjacent permanent magnets, so that waterways can be in full contact with the permanent magnets and the inner wall of the rotor, and the heat dissipation isimproved; the permanent magnet segmented structure can significantly reduce the eddy current loss of the permanent magnets and reduce heat generation.
Owner:HARBIN UNIV OF SCI & TECH

Low leakage current resetting device applied to capacitive integrating weak current measuring circuit

The invention belongs to the technical field of weak current measurement, and particularly relates to a low leakage current resetting device applied to a capacitive integrating weak current measuringcircuit. The resetting device is connected with a capacitance integrating weak current measuring circuit (2) used for measuring weak current to be measured (1). The resetting device comprises a resetcurrent circuit (3), a multiplexer (4), a D/A converter (5), a voltage follower (6) and a logic control unit (7). The voltage follower (6) can copy the voltage of the weak current to be measured (1) as the turn-off voltage of the reset current circuit (3). The D/A converter (5) can provide turn-on voltage with adjustable polarity and magnitude for the reset current circuit (3). The resetting device further comprises a logic control unit (7) which controls the multiplexer (4) to select to output turn-off voltage or turn-on voltage, and controls the polarity and magnitude of the turn-on voltageoutput by the D/A converter (5). According to the invention, the measurement lower limit and the minimum resolution of the capacitive integrating weak current measuring circuit system can be greatly improved.
Owner:CHINA INSTITUTE OF ATOMIC ENERGY

Heat treatment method for pre-aging, re-solid-solution and re-aging of Al-Cu-Li alloy

ActiveCN112281092AReduce the effect of strengtheningHigh strengthSolution treatmentHeat conservation
The invention discloses a heat treatment method for pre-aging, re-solid-solution and re-aging of an Al-Cu-Li alloy, belongs to the field of material heat treatment, and aims to perform conventional solid-solution, pre-aging, re-solid-solution and re-aging treatment on an Al-Cu-Li alloy extruded plate by controlling a heat treatment process system and parameters thereof. The conventional solid solution and re-solid solution treatment temperature is 515 +/-10 DEG C, heat preservation is performed for 60-90 min, then water quenching is performed, and the quenching transfer time is shorter than 5s. The pre-aging and re-aging treatment temperature is 160-180 DEG C, heat preservation is performed for 24-48 hours, and the product is taken out for air-cooling. The strength of the alloy can be reduced through re-solid-solution treatment, the plasticity of the alloy is improved, and correction and reprocessing processes are facilitated. The re-aging treatment can effectively regulate and control the variety, density and distribution of precipitated phases, thereby enhancing the strength of the alloy. In addition, due to coarsening of discontinuous grain boundary precipitated phases in the alloy and increasing of the copper content, on the premise that the strength of the alloy is basically not lost, the stress corrosion resistance, the intergranular corrosion resistance and the electrochemical corrosion resistance are improved, and the plasticity of the alloy is improved. The process is simple and feasible and is not limited by the thickness of the plate.
Owner:SHANDONG UNIV

Band-stop gas discharge tube, combined lightning protection device, protection circuit and electronic equipment

The embodiment of the invention discloses a band-stop gas discharge tube, a combined lightning protection device, a protection circuit and electronic equipment. The band-stop gas discharge tube comprises: a first porcelain tube; a first electrode and a second electrode which are respectively arranged at two ends of the first porcelain tube, wherein the first porcelain tube, the first electrode andthe second electrode form a closed space, and the closed space is filled with gas; a built-in resistor, wherein one end of the built-in resistor is in contact with the first electrode for electric conduction, and the other end of the built-in resistor is in contact with the second electrode for electric conduction, so that the built-in resistor is connected between the first electrode and the second electrode in parallel. Compared with the prior art, the protection performance of the protection circuit is improved, the service life of the protection circuit is prolonged, on the basis, the built-in resistor is integrated in the band-stop gas discharge tube, the overall structure of the protection circuit can be simplified, the compactness of the protection circuit is better, and the protection circuit can be applied to tight equipment installation.
Owner:SHENZHEN BENCENT ELECTRONICS CO LTD

Radio frequency coplanar waveguide element based on silicon base on insulator and preparation method thereof

The present invention provides a radio frequency coplanar waveguide element based on a silicon base on an insulator and a preparation method thereof. The method comprises: 1) preparing the silicon base on an insulator, wherein the silicon base on the insulator includes a ground floor silicon, an insulating layer and a top silicon which are stacked in order, and the lower portion of the insulating layer is provided with at least one groove of the ground floor silicon corresponding to the position of the preparation of the radio frequency coplanar waveguide element; 2) defining a device area, removing the top chain of the device area, and exposing the upper surface of the insulating layer at the lower portion of the device area; and 3) preparing the radio frequency coplanar waveguide element. Based on the silicon base on the graphical insulator, the radio frequency coplanar waveguide element based on the silicon base on the insulator and the preparation method thereof obtain the coplanar waveguide with a substrate cavity through later period etching, the air medium in the cavity structure allows the equivalent capacitance of the substrate to be reduced and allow the equivalent resistance to be increased so as to eliminate fixed charge and movable charge in the SiO2 and the unfavorable factors, influencing microwave transmission, such as Si/SiO2 system interface state, trap charge and the like, and therefore the medium loss is reduced, and the transmission performance of the coplanar waveguide is improved.
Owner:SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI

Method of improving write-in redundancy of static random access memory

The invention provides a method of improving write-in redundancy of a static random access memory. The static random access memory comprises an input / output device and a core device, wherein the core device comprises a pull-up pipe device, the input / output device is used for inputting and outputting signals of a chip and a peripheral circuit, and the thickness of a grid electrode oxide layer of the input / output device is larger than that of the grid electrode oxide layer of the core device. The method of improving write-in redundancy of static random access memory comprises the step of: enabling the thickness of the grid electrode oxide layer of the pull-up pipe device to be larger than that of the grid electrode oxide layer of the core device, and enabling the thickness of the grid electrode oxide layer of the pull-up pipe device to be equal to that of the grid electrode oxide layer of the core device. For example, when the grid electrode oxide layer of the pull-up pipe device is prepared, the formerly generated grid electrode oxide layer for the input / output device is not moved so as to enable the grid electrode oxide layer of the input / output device to serve as the grid electrode oxide layer of the pull-up pipe device.
Owner:SHANGHAI HUALI MICROELECTRONICS CORP

Static Random Access Memory and Write Redundancy Improvement Method in Embedded SiGe Process

A static random access memory in an embedded silicon germanium process, comprising: a silicon-based substrate; an NMOS device; a PMOS device, the gate of the PMOS device is arranged on the silicon-based substrate, and the source region and the drain region of the PMOS device are respectively arranged In the silicon-based substrate on both sides of the gate, embedded silicon germanium is arranged in the source region and the drain region; the pull-up transistor is a PMOS semiconductor, and the gate of the pull-up transistor is arranged on the silicon-based substrate. The source region and the drain region of the pull-up transistor are respectively arranged in the silicon base substrate on both sides of the gate. The present invention increases the compressive stress in the channel of the PMOS device by arranging embedded silicon germanium in the source region and the drain region of the PMOS device, thereby improving the hole mobility; There is no embedded silicon germanium in the drain region, so that the compressive stress of the pull-up transistor in the channel direction is reduced, the carrier mobility is reduced, and the equivalent resistance of the pull-up transistor is increased, thereby improving the static randomness. Memory write redundancy.
Owner:SHANGHAI HUALI MICROELECTRONICS CORP
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