Memory fault injection method and simulator thereof for software built-in test (BIT)

A fault injection and software testing technology, applied in the field of memory, can solve problems such as inability to execute, components cannot be injected, and the design of abnormal use cases is not comprehensive enough to ensure reliability and accuracy.

Inactive Publication Date: 2012-11-21
BEIHANG UNIV
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Problems solved by technology

[0005] However, traditional fault injection technology faces many problems: Although hardware-based fault injection technology injects real hardware faults, it is limited by the high density of components on the circuit board, and there is not enough space for additional hardware fault injection equipment such as probes and sockets. , and the internal faults of the more concerned components cannot be injected; software-based fault injection technology has various benefits in other applications, but the code of BIT software is not open (or not allowed to be modified), the operating structure is complex, and the accessibility is poor , so software fault injection has nowhere to start in BIT software testing; finally, although the fault injection technology based on simulation/simulation implemented by hardware description languages ​​such as VHDL and Verilog can accurately simulate the hardware environment in which BIT software runs, it cannot support BIT softw

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  • Memory fault injection method and simulator thereof for software built-in test (BIT)
  • Memory fault injection method and simulator thereof for software built-in test (BIT)
  • Memory fault injection method and simulator thereof for software built-in test (BIT)

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Embodiment Construction

[0041] The present invention will be further described in detail with reference to the accompanying drawings and embodiments.

[0042] Due to the closedness and non-invasiveness of the aviation board, it is not possible to directly inject faults into the hardware to test the board-level BIT software. Since the emulator is implemented in software according to the real hardware functions, it can be modified arbitrarily without intrusion and damage to the hardware and the applications running on it. Therefore, it is a feasible solution to apply the simulator and fault injection technology to BIT software testing. The basic technical thought of the present invention is: take the hardware circuit board of running BIT software as simulation object, adopt the method for simulator simulation to solve the bottleneck problem of BIT software test, give full play to the advantage of simulator, such as detailed function analysis to simulation object, The simulation method can inject the m...

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Abstract

The invention provides a memory fault injection method and a simulator thereof for a software BIT. A hardware circuit board carrying out BIT software serves as a mock object of the simulator. An analog module for simulating normal functions of a memory, a fault modeling and model analysis module for establishing and analyzing fault sequence files, a fault injection module for matching the faults to be injected, and a fault behavior analog module and a peripheral cross-linking environment simulation module are added to the simulator. The method includes establishing a fault mode base, writing and analyzing extensive makeup language (XML) fault sequence files into identifiable fault sequences, searching and injecting corresponding faults when a processor accesses the memory, and performing fault simulation when the faults are triggered. According to the method and the simulator, the injected fault modes are complete and fully cover test cases under each fault occurrence for the memory, sufficient tests can be performed on the BIT software on a circuit board level, and only the BIT software after the sufficient tests can guarantee accuracy and timeliness of BIT fault prediction of aeronautical airborne equipment and further guarantee system reliability and safety.

Description

technical field [0001] The invention relates to a fault injection technology in reliability engineering and a memory technology in computer engineering, in particular to a memory fault injection method and a simulator for BIT software testing. Background technique [0002] No matter how high the reliability of a system, equipment or product is, it cannot guarantee that it will always work normally. Users and maintainers must monitor its health status and know whether there is a fault or where a fault has occurred, so it must be monitored and tested. . Therefore, it is hoped that the system and equipment itself can provide convenience for this purpose. The characteristics of this kind of system and equipment that are convenient for monitoring their health status and easy for fault diagnosis and testing are the testability of the system and equipment. Testability refers to a design characteristic of a product that can promptly and accurately determine its state (working, non-...

Claims

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Application Information

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IPC IPC(8): G06F11/36
Inventor 徐萍徐军高小鹏王自力李毅张茂帝
Owner BEIHANG UNIV
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