Trench MOS transistor manufacturing method

Abstract

A method for manufacturing a trench type MOS transistor comprises: forming a trench in a silicon wafer; forming a gate structure in the trench; depositing an interlayer dielectric layer, and forming two kinds of contact holes in the interlayer dielectric layer by etching Patterns, one is the pattern corresponding to the contact hole in contact with the active region, and the other is the pattern as the peripheral protection ring of the device; ion implantation of B and P in the two contact holes forms a well region and a source region, while forming a guard ring in the guard ring area; deposit tetraethyl orthosilicate in two patterns of contact holes; deposit borophosphosilicate glass in two patterns of contact holes; reflow borophosphosilicate glass, and Contact hole sealing in the guard ring area; etching of borophosphosilicate glass to form spacers for contact holes in contact with the active area, thereby reducing the initial critical dimension of the contact hole in contact with the active area to the final critical dimension; The silicon substrate is etched with orthosilicate and borophosphosilicate glass as a barrier layer to form a contact hole in contact with the active area; a contact hole barrier layer is formed and metal is deposited, and then the metal is etched.

Description

technical field [0001] The present invention relates to a semiconductor manufacturing process, and more particularly, the present invention relates to a method for manufacturing a trench MOS transistor. Background technique [0002] As a new type of vertical structure device, trench MOS (trench MOS) transistor is developed on the basis of VDMOS (vertical double-diffused metal-oxide semiconductor field effect transistor), both of which are high cell density devices. However, this structure has many performance advantages compared with the former: such as lower on-resistance, low gate-drain charge density, thus low conduction and switching losses and fast switching speed. At the same time, since the channel of the trench MOS is vertical, the channel density can be further increased and the chip size can be reduced. [0003] figure 1 is a cross-sectional view of a conventional trench MOS transistor. like figure 1 As shown, a conventional trench MOS transistor includes a sem...

AI Technical Summary

Problems solved by technology

However, since the three processes of well implantation, source implantation, and contact hole formation are completed in three steps, three photomasks are required to complete these three processes.

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