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Double capture-silicon oxide nitride oxide semiconductor (SONOS) memorizer with double layer dielectric charge trapping layer and preparation method thereof

A DC-SONOS, charge trapping layer technology, applied in electric solid-state devices, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of insufficient data retention performance, singleness, etc., to improve the erasing speed and resistance to erasing and writing. ability, improved performance, the effect of suppressing vertical transport of holes

Inactive Publication Date: 2013-04-24
EAST CHINA NORMAL UNIVERSITY +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Conventional SONOS devices cannot provide sufficient data retention performance due to their single charge trapping layer structure
[0005] The present invention overcomes the limitation that the charge trapping layer of the prior art is a single structure, and proposes a DC-SONOS memory with a double-layer dielectric charge trapping layer. By changing the device structure, the data retention characteristics of the memory are improved, which is beneficial to obtain SONOS nonvolatile memory that maintains high data retention characteristics under harsh conditions

Method used

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  • Double capture-silicon oxide nitride oxide semiconductor (SONOS) memorizer with double layer dielectric charge trapping layer and preparation method thereof
  • Double capture-silicon oxide nitride oxide semiconductor (SONOS) memorizer with double layer dielectric charge trapping layer and preparation method thereof
  • Double capture-silicon oxide nitride oxide semiconductor (SONOS) memorizer with double layer dielectric charge trapping layer and preparation method thereof

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Embodiment 1

[0032] This embodiment provides a specific preparation method of the memory of the present invention.

[0033] First provide a semiconductor substrate 1, and then dry oxygen oxidation on the substrate to form a layer of SiO 2, the thickness of this layer is 54?, which is the tunneling layer 6-3. Then use LPCVD technology to form 20 ? Si3N4 successively, which is the first layer of dielectric 6-2a. A layer of SiN is then formed on top of it using PECVD technology, which is the second layer of dielectric 6-2b with a thickness of 40 Å. These two layers together form the composite charge trapping layer 6-2. A 60 Å SiO2 blocking layer 6-1 is then formed on the charge trapping layer using LPCVD technology. Then a gate 3 is formed on it by LPCVD, and sidewalls 5 are formed on both sides of the gate 3 . Finally, the source terminal and the drain terminal 2 are formed by self-aligned ion implantation.

[0034] In actual use of the DC-SONOS memory of the present invention, when ther...

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Abstract

The invention relates to the field of semiconductor charge capture memorizers, and discloses a nonvolatile double capture-silicon oxide nitride oxide semiconductor (SONOS) memorizer with a double layer dielectric charge capture layer. The nonvolatile DC-SONOS memorizer with the double layer dielectric charge trapping layer comprises a semiconductor substrate of a channel which is provided with a channel surface, a source terminal adjacent to the channel and a drain terminal adjacent to the channel, a grid electrode, a dielectric stack arranged between the grid electrode and the channel surface, and side walls arranged at two sides of the grid electrode and two sides of the dielectric stack. The dielectric stack comprises a tunneling layer contacted with the surface of the channel, a charge capture layer superimposed on the tunneling layer, the charge capture layer is of a double layer dielectric composite structure, a barrier layer superimposed on the charge capture layer, and the barrier layer is contacted with the grid electrode. The charge capture layer comprises a first layer dielectric contacted with the tunneling layer, wherein the first layer dielectric is made of Si3N4, the thickness of the first layer dielectric is 1-30, a second layer dielectric adjacent to the first layer dielectric, wherein the second layer dielectric is made of SiN, and the thickness of the second layer dielectric is 1-50. According to the DC-SONOS memorizer with the double layer dielectric charge capture layer, performance of traditional SONOS nonvolatile memorizers is improved, data-hold feature of the memorizer is improved, and the memorizer which is capable of keeping high data-hold feature under poor operating conditions is easy to obtain.

Description

technical field [0001] The invention relates to the field of semiconductor charge trapping memory, in particular to a DC-SONOS memory with a double-layer dielectric charge trapping layer and a preparation method thereof. Background technique [0002] In the field of semiconductor memory, flash memory is a kind of non-volatile memory technology. Traditional flash memory uses floating gates as charge storage units. However, with the continuous development of flash memory technology, the storage density continues to increase, and the distance between floating gates If it is reduced, there will be mutual influence between the stored charges of adjacent floating gates, which hinders the increase of storage density for floating gate flash memory technology. The SONOS (silicon-silicon dioxide-silicon nitride-silicon dioxide-silicon) memory uses an insulating charge trapping layer to replace the floating gate, completely avoiding the interaction between the stored charges, and it al...

Claims

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Application Information

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IPC IPC(8): H01L27/115H01L29/792H01L29/51H01L21/8247H01L21/28
Inventor 石艳玲刘丽娟张顺斌曹刚陈广龙沈国飞张龙
Owner EAST CHINA NORMAL UNIVERSITY
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