Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method for manufacturing semiconductor device

A semiconductor and gas processing technology, used in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve problems such as threshold voltage shift and gate stack regrowth.

Active Publication Date: 2016-04-06
SEMICON MFG INT (SHANGHAI) CORP
View PDF2 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since the metal gate in the Gate-first process is subjected to a high-temperature process, this process may cause problems such as thermal stability, threshold voltage drift, and gate stack regrowth, which are very serious problems for PMOS

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for manufacturing semiconductor device
  • Method for manufacturing semiconductor device
  • Method for manufacturing semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] Next, the present invention will be described more fully with reference to the accompanying drawings, in which embodiments of the invention are shown. However, this invention may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

[0024] It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to" or "coupled to" another element or layer, it can be directly on the other element or layer. A layer may be on, adjacent to, connected to, or coupled to other elements or layers, or intervening elements or layers may be present. In contrast, when a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
thicknessaaaaaaaaaa
Login to View More

Abstract

The invention discloses a method for manufacturing a semiconductor device. The method comprises the following steps: (a) providing a semiconductor substrate, wherein a first false grid electrode, a first metal grid electrode and an inter layer dielectrics layer surrounding the first false grid electrode and the first metal grid electrode are formed on the semiconductor substrate; (b) removing the first false grid electrode so as to form a first filling opening; (c) carrying out N2H2 gas treatment process; and (d) forming a second metal grid electrode in the first filling opening. According to the method, polymer is removed and oxide is reduced by carrying out the N2H2 gas treatment process after the false grid electrode is removed so as to avoid the fact that conductivity of an N-type transistor and a P-type transistor is affected due to the existence of the polymer and the oxide at an interface.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for manufacturing a semiconductor device. Background technique [0002] As the gate size shrinks to tens of nanometers, the thickness of the gate oxide layer drops below 3nm, causing problems such as excessive gate resistance, increased gate leakage, and depletion of the polysilicon gate. Therefore, people turn their attention to the metal gate technology again. The metal gate technology uses a metal with a lower resistance as the gate, and a material with a larger dielectric constant as the gate dielectric layer. [0003] The metal gate technology includes a gate-first process and a gate-last process. The Gate-first process refers to the formation of metal gates before performing drain / source region ion implantation and subsequent high-temperature annealing steps on the silicon wafer, while the Gate-last process is the opposite. Since the metal gate in the Gate...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/28
Inventor 李凤莲倪景华韩秋华
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com