Pseudomorphic high electron mobility transistor and manufacturing method of the same
A high electron mobility, transistor technology, used in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve problems such as large gate resistance, which is not conducive to improving device performance, and achieve the effect of reducing parasitic capacitance and improving frequency characteristics
Active Publication Date: 2013-06-05
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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In actual production, the short channel effect will occur if the gate line width is small to a certain extent; if the gate cap size is too small, the gate resistance will be too large, which is not conducive to improving the performance of the device
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[0039] Below in conjunction with accompanying drawing, the present invention is further described in detail:
[0040] The invention relates to a pseudo-high electron mobility transistor, figure 2 Devices 32 and 33 are embodiments of the present invention. In the device 32, 1 is a substrate, 2 is a buffer layer, 3 is a channel and barrier layer, 4 is a low-doped GaAs layer, and 5 is a high-doped GaAs cap layer. The substrate 1 is gallium arsenide material, and the buffer layer 2 is located between the substrate and the channel layer. It is mainly used as a transition and builds a potential barrier to reduce the leakage from the active layer to the substrate. Lattice structures, which are more common in this application, will not be described further. The channel and barrier layers 3 are GaInAs and GaAlAs materials, which are selected for their high electron mobility and high potential barrier relative to GaAs, respectively. The material of the channel layer and the barrier ...
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The invention relates to a pseudomorphic high electron mobility transistor, and meanwhile relates to a manufacturing method of the pseudomorphic high electron mobility transistor. The pseudomorphic high electron mobility transistor and the manufacturing method of the pseudomorphic high electron mobility transistor comprise an InGaAs channel, an AlGaAs barrier layer, a low doping gallium arsenide layer and a high doping gallium arsenide layer, wherein the low doping gallium arsenide layer is arranged on the InGaAs channel and the InGaAs barrier layer; the high doping gallium arsenide layer is arranged on the low doping gallium arsenide layer, and is provided with a source electrode and a leaking electrode; a first groove is arranged between the source electrode and the leaking electrode; a second groove is arranged in the first groove; gate electrode metal is located on the second groove; and a first dielectric layer is arranged on the surface of the gate metal, a second dielectric layer is arranged on the surface of the transistor, and a cavity is formed between the first dielectric layer and the second dielectric layer. Because a special device morphology structure is formed, and the processes that glue and growth medium are coated, and a sacrifice glue layer is removed are conducted, a huge vacuum cavity is formed at two sides of the gate electrode, stray capacitance of a gate is substantially reduced, and frequency characteristics of a device are substantially improved.
Description
technical field [0001] The invention relates to a pseudo-high electron mobility transistor, specifically a gallium indium arsenide / gallium aluminum arsenide / gallium arsenide pseudo-high electron mobility transistor, and the invention also discloses its manufacturing method . Background technique [0002] With the development of science and technology, various microwave application systems urgently need electronic devices suitable for high-frequency characteristics, and electronic devices based on compound semiconductors play an irreplaceable role in microwave systems. Through people's continuous efforts, the application of electronic devices based on compound semiconductors has gradually extended from lower frequencies such as S, X, and Ku bands to 8mm or even 3mm bands. In the process of gradually increasing the frequency of use, the device must also be continuously optimized and adjusted. The most commonly used method is to optimize the gate structure to reduce the parasi...
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IPC IPC(8): H01L29/778H01L21/335
Inventor 章军云高建峰
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD