Thyristor gate cathode structure and gate pole commutation thyristor with thyristor gate cathode structure
A gate cathode and thyristor technology, which is applied in the field of semiconductor device structure, can solve the problem of high doping concentration, and achieve the effects of increasing on-current, increasing turn-on speed and improving turn-on speed.
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Embodiment 1
[0113] as attached Figure 43 A specific implementation method of a gate-commutated thyristor manufacturing method shown in the process of A. The gate-commutated thyristor includes more than one cell, and the manufacturing method of the gate-commutated thyristor includes more than one gate-commutated thyristor cell. The preparation method, wherein, the preparation method of a single gate commutated thyristor cell comprises the following steps:
[0114] S101: Prepare N-type substrate, as attached Figure 22 shown;
[0115] S102: Perform selective P+ diffusion treatment on the front side of the N-type substrate to form a P+ short base region 5, as shown in the attached Figure 23 As shown in the figure, the width L between the two P+ short base regions 5 is adjustable;
[0116] S103: Perform P diffusion treatment on the front side of the N-type substrate to form the P base region 4, and form the J2 junction 11 between the P base region 4 and the N-substrate 3, as shown in the...
Embodiment 2
[0127] as attached Figure 43 A specific implementation method of a gate-commutated thyristor manufacturing method shown in the process of C. The gate-commutated thyristor includes more than one cell, and the manufacturing method of the gate-commutated thyristor includes more than one gate-commutated thyristor cell. The preparation method, the preparation method of a single gate commutated thyristor cell comprises the following steps:
[0128] S301: preparing an N-type substrate;
[0129] S302: Perform P diffusion treatment on the front side of the N-type substrate to form a P base region 4, and form a J2 junction 11 between the P base region 4 and the N-substrate 3;
[0130] S303: performing selective P+ diffusion treatment on the front side of the N-type substrate to form a P+ short base region 5;
[0131] S304: performing N' diffusion treatment on the back surface of the N-type substrate to form an N' buffer layer 2;
[0132] S305: performing N+ pre-deposition treatment ...
Embodiment 3
[0143] as attached Figure 43 A specific implementation method of a gate-commutated thyristor manufacturing method shown in the process of B, the gate-commutated thyristor includes more than one cell, and the manufacturing method of the gate-commutated thyristor includes more than one gate-commutated thyristor cell The preparation method, the preparation method of a single gate commutated thyristor cell comprises the following steps:
[0144] S201: Prepare N-type substrate, as attached Figure 32 shown;
[0145] S202: Perform P' diffusion treatment on the front side of the N-type substrate, as shown in the attached Figure 33 shown;
[0146] S203: Perform selective P+ diffusion treatment on the front side of the N-type substrate to form a P+ short base region 5, as shown in the attached Figure 34 shown;
[0147] S204: Perform P diffusion treatment on the front side of the N-type substrate to form the P base region 4, and form the J2 junction 11 between the P base region ...
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