Hollow channel isolation region preparation method

Abstract

The invention discloses a hollow channel isolation region preparation method which comprises the following steps: providing a supporting base; sequentially depositing buffering oxide layers and nitride layers on the supporting base; etching a hollow channel by utilizing the shallow trench isolation (STI) manufacturing technique; etching buffering oxide layer cuts on two sides of the shallow channel to form a groove; performing the first etching on the nitride layers on two sides of the shallow channel; growing a layer of oxidation film on the surface of the supporting base; and performing the second etching on the nitride layers on two sides of the shallow channel. The method starts from morphology of nitrides and realizes performance improvement of devices through modification of fewer craft processes, and utilizes twice etching to improve morphology of silicon nitride, so that the problem that the shallow channel isolation top edge lacks corners or hollows after the silicon nitride is removed is solved; and at the same time, the outline of corners of the shallow channel isolation region can be improved, so that the subsequent handling is facilitated.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for manufacturing a shallow trench isolation region. Background technique [0002] In recent years, with the development of semiconductor integrated circuit manufacturing technology, the number of components contained in the chip has been increasing, and the size of the components has been continuously reduced due to the improvement of integration. The line width used in the production line has entered the sub-micron level. scope. However, no matter how the device size is reduced, there must still be proper insulation or isolation between the various devices in the chip in order to obtain good device properties. The technology in this area is generally called Device Isolation Technology (Device Isolation Technology), and its main purpose is to form spacers between the components, and to ensure good isolation effect, minimize the area of ​​the spacers to free u...

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Problems solved by technology

However, STI also has many technical problems in the process, such as the shape control of STI, the rounding of the top corner of STI, the adaptation stress between the silicon dioxide inside the STI and the external silicon, and the defect of the top edge of the shallow trench isolation region. Corner problem (STIDivot), etc.

Among them, the problem caused by the notch at the top edge of the shallow trench isolation region will be directly related to the leakage problem at the edge of the STI, which will affect the characteristics of the device. When an inversion layer is formed on the side of the active region, it will cause a parasitic current path, which will affect the characteristics of the device, and the notch at the top edge of the too deep shallow trench isolation region will increase the etching of the polysilicon gate and silicon nitride sidewall Therefore, controlling the size and depth of the notch at the top edge of the shallow trench isolation region has attracted more and more attention.

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