Groove of P type LDMOS device and manufacture method of groove
A manufacturing method and trench technology, which are applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of difficult control of N-type polysilicon etching and difficult process, so as to prevent short channel effect and high Performance, the effect of good electrical connection
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0033] The trench of the P-type LDMOS device according to the present invention has a structure such as Figure 11 As shown, the P-type LDMOS is located in the epitaxy 2 on the substrate 1, has a lightly doped drain region 8 and an N-type channel region 5 that are in contact with each other, and the source region 10 of the P-type LDMOS is located in the N-type In the channel region 5, the drain region 9 is located in the lightly doped drain region 8, and the surface of the epitaxy 2 has the gate oxide 6 and the polysilicon gate 7 of the P-type LDMOS device, and the polysilicon gate 7 is covered with tungsten silicon 13; The trench 17 of the P-type LDMOS device is located in the source region 10 and is divided into upper and lower ends. The width of the upward trench 17 gradually increases to form a slope, which is funnel-shaped. The lower end of the trench 17 is filled with heavily doped N-type polysilicon 18 , and the upper end is filled with metal silicide 12 .
[0034] The...
PUM
Login to View More Abstract
Description
Claims
Application Information
Login to View More 


