Capacitor and its preparation method
A technology of capacitors and dielectrics, applied in the field of capacitors and their preparation, can solve the problems of low dielectric constant, lower breakdown voltage of MOM capacitor 1, and inability to increase the capacitance value of MOM, so as to achieve the effect of increasing capacitance value and increasing breakdown voltage
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[0039] According to the above research, the core idea of the present invention is to provide a method for preparing a capacitor, comprising the following steps:
[0040] Step S11, providing a substrate with a first dielectric thereon, and the first dielectric contains a plurality of stacked finger structures, each of which includes a plurality of first finger structures and A plurality of second finger structures, in the same inter-finger structure, the first finger structures and the second finger structures are relatively alternately arranged;
[0041]Step S12, etching the first dielectric to form a plurality of grooves, the grooves are located between the first finger structure and the second finger structure in the same interfinger structure;
[0042] Step S13 , filling the groove with a second dielectric, the dielectric constant of the second dielectric is greater than that of the first dielectric.
[0043] Using the above preparation method, the dielectric constant of...
no. 1 example
[0053] see Figure 4-Figure 9 Specifically illustrate the capacitor of the present invention and its preparation method, wherein, Figure 4 It is a flow chart of the manufacturing method of the capacitor in the first embodiment of the present invention; Figure 5 to Figure 9 It is a schematic diagram of the device structure in the method for manufacturing a capacitor in the first embodiment of the present invention. In the present invention, the capacitor is integrated in the back-end process of the logic device process, and the logic device is prepared by advanced logic technology with a feature size ≤ 90nm.
[0054] Such as Figure 4 As shown, step S11 is first performed, such as Image 6 As shown, a substrate 100 is provided, and a first dielectric 200 is provided on the substrate 100, and the first dielectric 200 includes a plurality of stacked interfinger structures 210 therein. In this embodiment, the substrate 100 may be a silicon substrate or silicon-on-insulator o...
no. 2 example
[0065] see Figure 10-Figure 12 , Figure 10 to Figure 12 It is a schematic diagram of the device structure in the method for preparing a capacitor in the second embodiment of the present invention. exist Figure 10-Figure 12 , the reference numerals indicate the same Figure 6-Figure 9 The same expression is the same structure as the first embodiment. The preparation method of the second embodiment is basically the same as the preparation method of the first embodiment, the difference is that step S12 specifically includes:
[0066] Such as Figure 10 As shown, a protection layer 400 is formed on the top finger structure 210 , and the protection layer 400 only covers the top layer finger structure 210 . Preferably, the material of the finger structure 210 is the same as that of the protection layer 400. For example, in this embodiment, the material of the finger structure 210 is metal copper, and the chemical vapor deposition process can be adjusted. A layer of copper i...
PUM
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