Floating gate and forming method thereof, and flash memory unit and forming method thereof

Abstract

Provided are a floating gate and a forming method thereof, and a flash memory unit and a forming method thereof. The forming method of the floating gate comprises the steps of providing a semiconductor substrate, forming a gate dielectric layer on the semiconductor substrate, forming a floating gate layer on the gate dielectric layer, doping the floating gate layer with fluorine ions, and annealing. According to the forming method of the floating gate provided by the invention, the floating gate layer is doped with fluorine ions, and annealing is carried out to activate the fluoride ions, so that the fluoride ions can react with active silicon atoms at the polysilicon grain boundary to passivate the silicon atoms at the grain boundary, thereby improving the data storage performance of a flash memory unit formed with the floating gate in the subsequent process.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a floating gate and its forming method, a flash memory unit and its forming method. Background technique [0002] In the semiconductor industry, integrated circuit products are mainly divided into three types: analog circuits, digital circuits, and digital / analog hybrid circuits, among which memory devices are an important component of digital circuits. The nonvolatile memory in the memory device includes electrically programmable read only memory (EPROM), electrically erasable programmable read only memory (EEPROM) and flash memory (flash memory). Compared with other non-volatile memories, flash memory has the characteristics of non-volatile data storage, low power consumption, high integration, fast access speed, easy erasing and rewriting, and low cost. Therefore, Flash memory is widely used in various fields, such as embedded systems, computers, telecommunication swit...

AI Technical Summary

Problems solved by technology

Please refer to figure 1 , figure 1 It shows the threshold voltage changes of the existing flash memory cells before and after the baking test. Before the test, the threshold voltages of all the flash memory cells in a flash memory product are shown in the normal distribution curve 1, but after the baking test, all The threshold voltage of the flash memory cell is shown in the normal distribution curve 2. It can be seen that during the baking test, the threshold voltage of the flash memory cell has shifted from figure 1 You can also see the threshold voltage offset ΔV in , the threshold voltage offset is due to data loss

It can be seen that the data storage performance of the existing flash memory unit needs to be improved

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