Manufacturing method for metal interconnecting structure
A technology of metal interconnection structure and manufacturing method, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc. The etching process is easy, the thickness of the photoresist is reduced, and the effect of resisting large currents is improved
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2015-04-29
Smart Images
Figure 1 Figure 2 Figure 3
Abstract
Description
technical field
[0001] The invention relates to a semiconductor integrated circuit manufacturing process method, in particular to a metal interconnection structure manufacturing method. Background technique
[0002] The application of metals and metallic materials in integrated circuit processing is called metallization. Most modern metal systems use aluminum-copper-silicon alloys as interconnect metal materials in integrated circuit processes. Such as Figure 1A to Figure 1E As shown, it is a schematic diagram of the metal interconnection structure in each step of the manufacturing method of the existing metal interconnection structure; the general single-layer metal (SLM) interconnection is realized in the manufacturing method of the existing metal interconnection structure, and the forming process includes the following steps :
[0003] Step 1, such as Figure 1A As shown, a substrate 102 is provided, on which a doped region 101 that needs to be drawn out through a met...
Examples
Embodiment Construction
[0031] Such as figure 2 Shown is a flowchart of a method for manufacturing a metal interconnection structure according to an embodiment of the present invention; as Figure 3A to Figure 3H Shown is a schematic diagram of the metal interconnection structure in each step of the method of the embodiment of the present invention. The manufacturing method of the metal interconnection structure according to the embodiment of the present invention includes the following steps:
[0032] Step 1, such as Figure 3A As shown, a substrate 2 is provided, on which a doped region 1 that needs to be drawn out through a metal interconnection structure is formed, and the doped region 1 is formed by implantation or diffusion. Such as Figure 3B As shown, after the final implantation and diffusion are completed, a dielectric layer 3 is grown or deposited on the substrate 2, and the dielectric layer 3 serves as an interlayer film.
[0033] Preferably, the dielectric layer 3 is an oxide dielec...