A kind of semiconductor memory device and its preparation method
A technology of storage devices and semiconductors, applied in semiconductor devices, electric solid state devices, electrical components, etc., can solve problems affecting device performance and exacerbation
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Embodiment 1
[0048] Attached below Figure 2a-2h This example will be described.
[0049] First, step 201 is performed to provide a semiconductor substrate 201 on which a tunnel oxide layer (tunnel oxide) 202 , a floating gate layer 203 and a mask layer 204 are formed.
[0050] Specifically, please refer to Figure 2a , first provide a semiconductor substrate 201, wherein the semiconductor substrate 201 can be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), germanium-on-insulator Silicon-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI), and germanium-on-insulator (GeOI). In addition, an active region may be defined on the semiconductor substrate 201 . Other active devices may also be included on the active area, which are not marked in the shown figures for convenience.
[0051] The semiconductor substrate 201 can be selected as P-type, and a tunnel oxide layer is deposited on the semiconductor substrate 2...
Embodiment 2
[0098] The present invention also provides a semiconductor memory device, comprising:
[0099] A gate stack structure, including a tunnel oxide layer 202, a floating gate layer 203, an insulating isolation layer 206 and a control gate layer 207 deposited in sequence, is located on the semiconductor substrate 201;
[0100] Wherein, an ion-doped region is formed on the periphery of the floating gate layer 203 .
[0101] Further, the device further includes:
[0102] a shallow trench isolation structure located in the semiconductor substrate 201 on both sides of the floating gate structure;
[0103] The spacer is located on the sidewall of the floating gate structure.
[0104] Wherein, the floating gate layer 203 is an N-type floating gate, and the ion-doped region is a P-type.
[0105] In the present invention, in order to solve the problem in the prior art that dopant ions easily enter the semiconductor substrate during the formation of the double-doped floating gate and aff...
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