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Interconnection layer, its manufacturing method and semiconductor device

A manufacturing method and interconnection layer technology, which are applied in the fields of semiconductor devices, semiconductor/solid-state device manufacturing, and semiconductor/solid-state device parts, etc. Improves adhesion and avoids delamination

Active Publication Date: 2018-09-18
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of this application is to provide an interconnection layer, its manufacturing method and semiconductor device manufacturing method, to solve the problem of poor bonding strength between the metal filling part and the barrier layer in the prior art, and then improve the interconnection layer. reliability

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0050] This embodiment provides a method for fabricating an interconnection layer, including forming a SiO layer with a through hole on a substrate. 2 Dielectric layer, and fill the through hole to form a Cu layer, surface treat the Cu layer, and in SiO 2 A step of forming a SiC barrier layer on the dielectric layer and the Cu layer. Wherein, the step of carrying out surface treatment to Cu layer comprises:

[0051] Using Si plasma to perform Si doping treatment on the Cu layer, the process conditions are: use tetramethylsilane as the reaction gas, the flow rate of tetramethylsilane is 50sccm, the reaction pressure is 0.1torr, and the power is 100w;

[0052]Ar is used to carry out ion bombardment treatment on the Si-doped region on the surface of the Cu layer, and the process conditions are as follows: the power is 1000w, the flow rate of Ar is 800sccm, and the pressure is 5torr.

Embodiment 2

[0054] This embodiment provides a method for fabricating an interconnection layer, including forming a SiO layer with a through hole on a substrate. 2 Dielectric layer, and fill the through hole to form a Cu layer, surface treat the Cu layer, and in SiO 2 A step of forming a SiC barrier layer on the dielectric layer and the Cu layer. Wherein, the step of carrying out surface treatment to Cu layer comprises:

[0055] Using Si plasma to do Si doping treatment on the Cu layer, the process conditions are: using silicon tetrahydrogen as the reaction gas, the flow rate of silicon tetrahydrogen is 1000sccm, the reaction pressure is 10torr, and the power is 2000w;

[0056] Use He to carry out ion bombardment treatment on the Si-doped region on the surface of the Cu layer, and the process conditions are: the power is 100w, the flow rate of Ar is 50sccm, and the pressure is 0.1torr;

[0057] Using NH 3 Nitrogen doping treatment is performed on the Si-doped region on the surface of th...

Embodiment 3

[0059] This embodiment provides a method for fabricating an interconnection layer, including forming a SiO layer with a through hole on a substrate. 2 Dielectric layer, and fill the through hole to form a Cu layer, surface treat the Cu layer, and in SiO 2 A step of forming a SiC barrier layer on the dielectric layer and the Cu layer. Wherein, the step of carrying out surface treatment to Cu layer comprises:

[0060] Using Si plasma to do Si doping treatment on the Cu layer, the process conditions are: using trimethylsilane as the reaction gas, the flow rate of trimethylsilane is 800 sccm, the reaction pressure is 5torr, and the power is 1000w;

[0061] Use N2 to carry out ion bombardment treatment on the Si-doped region on the surface of the Cu layer, and the process conditions are: the power is 2000w, the flow rate of Ar is 1000sccm, and the pressure is 10torr;

[0062] Use N 2 Nitrogen doping treatment is carried out on the Si-doped region on the surface of the Cu layer. ...

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PUM

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Abstract

The invention discloses an interconnection layer, a manufacturing method thereof and a semiconductor device. The manufacturing method of the interconnection layer comprises the following steps: forming a dielectric layer with a through hole on a substrate, filling in the through hole to form a metal filling part, and forming a barrier layer on the dielectric layer and the metal filling part, and also comprises a step of performing surface treatment on the metal filling part before the step of forming the barrier, wherein the step comprises the sub-steps: performing Si doping treatment on the metal filling part to form the Si doped region on the surface of the metal filling part; performing ion bombardment treatment on the Si doped region on the surface of the metal filling part. According to the manufacturing method, a rough surface with Si dangling bond is formed on the metal filling part, so that the binding between the metal filling part and the barrier layer is tighter, further the adhesion force between the metal filling part and the barrier layer is improved, and the reliability of the interconnection layer is improved.

Description

technical field [0001] The present application relates to the technical field of semiconductor integrated circuits, in particular, to an interconnection layer, a manufacturing method thereof, and a semiconductor device. Background technique [0002] With the development of very large-scale integrated circuits, the RC delay of the metal interconnection layer of integrated circuits has become the main factor restricting the further improvement of integrated circuit speed. Adopt Cu / low K dielectric layer instead of traditional Al / SiO 2 The system can greatly improve the performance of integrated circuits. However, the diffusion speed of Cu in the dielectric layer is quite fast, and once Cu enters the device structure, it will form deep-level impurities, which have a strong trap effect on the carriers in the device, resulting in device performance degradation or even failure. Therefore, it is necessary to add a barrier layer between Cu and the interconnect dielectric layer to ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/522
Inventor 周鸣
Owner SEMICON MFG INT (SHANGHAI) CORP