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4 results about "Si doped" patented technology

Low-temperature low-noise InP-based HEMT device structure

PendingCN121126818ALow noiseIsolation layer
The invention discloses a low-temperature and low-noise InP-based HEMT device structure which comprises a substrate layer, a first buffer layer, a second buffer layer, a first channel layer, a second channel layer, an isolation layer, a delta-Si doping layer, a barrier layer, an etching stop layer and a cap layer from bottom to top in sequence. Wherein the second buffer layer adopts gradient components, the component is InzAl1-zAs, z is 0.52-0.60, and the value of z is gradually increased from bottom to top in the thickness direction; the first channel layer adopts gradient components, the component is In < x > Ga < 1-x > As, and x is 0.60-0.80; and the x value is gradually increased from bottom to top in the thickness direction. By optimizing the structure of the device, the noise performance of the InP-based HEMT under the low-temperature condition is remarkably improved, and the low-temperature low-noise HEMT is of great significance to the design of a low-temperature low-noise amplifier.
Owner:DALIAN UNIV OF TECH

InAs / GaSb superlattice medium / long wave two-color infrared detector based on nBn structure

ActiveCN224069047UImprove absorption efficiencysuppress crosstalkSi dopedDark current
The utility model discloses an InAs / GaSb superlattice medium / long wave double-color infrared detector based on an nBn structure, which belongs to the technical field of optoelectronic devices and comprises a GaSb substrate, a non-doped GaSb buffer layer, a 14ML InAs / 7ML GaSb superlattice Si doped layer, a 14ML InAs / 7ML GaSb superlattice unintentional doped layer, a 4ML InAs / 7ML GaSb superlattice unintentional doped layer, a 8ML InAs / 6ML GaSb superlattice unintentional doped layer and a 8ML InAs / 6ML GaSb superlattice Si doped layer which are sequentially arranged from bottom to top. The medium / long wave absorption layers of 14ML InAs / 7ML GaSb superlattices and 8ML InAs / 6ML GaSb superlattices are combined, so that high absorption efficiency and low crosstalk of medium / long wave band response are realized, and low dark current and wide temperature range working capability are realized.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

A multilayer topcon structure for perovskite / silicon tandem solar cell interface and a preparation method thereof

PendingCN122094298ADopantChemical physics
This invention discloses a multilayer TOPCon structure for the interface of perovskite / silicon tandem solar cells and its fabrication method. The multilayer TOPCon structure comprises, from bottom to top: a silicon substrate, multiple alternating layers of SiO2. x The tunneling layer and the poly-Si doped layer, wherein: SiO x The tunneling layer consists of 1 to 5 layers, with a single layer thickness of 0.8 to 1.2 nm, and SiO₂. x The total thickness of the tunneling layer is ≤3nm; and SiO x The tunneling layer is doped with nitrogen (N), with an N / O atomic ratio of 0.05–0.15; the number of poly-Si doped layers is related to the SiO₂ content. x The tunneling layer is consistent, and the total thickness of the poly-Si doped layer is 60~150 nm. P is used as the main dopant in the poly-Si doped layer, with an average concentration of activated P atoms of 1×10⁻⁶. 20 ~1×10 21 cm ‑3 Furthermore, the P doping concentration in the poly-Si doped layer increases in a gradient from the side closest to the silicon substrate to the side furthest from the silicon substrate. In this invention, the combination of multilayer TOPCon architecture and precise doping modification optimizes the carrier transport between the top and bottom cells, and the multilayer poly-Si structure effectively reduces total optical parasitics and improves the light capture efficiency of the tandem cell.
Owner:NANCHANG HANGKONG UNIVERSITY

Ferroelectric film, ferroelectric memory unit, ferroelectric memory array and chip

The invention provides a ferroelectric film, a ferroelectric memory unit, a ferroelectric memory array and a chip. The ferroelectric film includes: a ferroelectric layer including 1% to 5% of an Al or Si doped ferroelectric material; or, 1% to 10% of a TiN or TaN doped ferroelectric material; or, comprises; wherein the value range of x is from 0.25 to 0.75, the value range of gamma is from 1.8 to 2.2, and the thickness of the ferroelectric layer is from 1 to 20 nanometers. The ferroelectric film material can be formed within the range of 1-5 nanometers, the element of the ferroelectric film material is a common and pollution-free material in the current silicon process, and the coercive field can be adjusted by adjusting the element doping concentration through the ferroelectric film with a high rectification ratio, so that the rectification ratio and the minimum leakage current critical voltage position are modulated, and the latent path leakage current in the FeTerRAM is reduced.
Owner:SHANGHAI SHENMING AOSI SEMICONDUCTOR TECHNOLOGY CO LTD