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A kind of formation method of nickel silicide

A nickel silicide and metal silicide technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of adverse effects on the electrical properties of devices, and do not take into account the negative effects of TiN stress layers, and achieve improved performance. Effect

Active Publication Date: 2018-01-26
SHANGHAI HUALI MICROELECTRONICS CORP
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Problems solved by technology

[0006] However, the above-mentioned existing Ni silicide formation process adopts TiN with a single stress to cover NMOS and PMOS as a protective layer of NiPt, and TiN with a single stress (tensile stress or compressive stress) can only be applied to NMOS or PMOS. Contributes to the enhancement of either the electron mobility or the hole mobility of one of the PMOS devices, but in favor of one of them, it can adversely affect the electrical performance of the other device
[0007] Therefore, the existing Ni silicide formation process does not take into account the negative effects brought by the TiN stress layer introduced during the formation of metal silicide, and needs to be optimized

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  • A kind of formation method of nickel silicide
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  • A kind of formation method of nickel silicide

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Embodiment Construction

[0029] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0030] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.

[0031] In the following specific embodiments of the present invention, please refer to figure 1 , figure 1 It is a flowchart of a method for forming a nickel silicide of the present invention. Also, see Figure 2 to Figure 7 , Figure 2 to Figure 7 is a preferred embodiment of the present invention according to figure 1 Schematic diagram of the ...

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Abstract

The invention discloses a method for forming nickel silicide. With the application of the stress technology, TiN layers of opposite stresses are applied to an NMOS (N-channel metal oxide semiconductor) and a PMOS (P-channel metal oxide semiconductor) as protection layers of NiPt. In a following nickel silicide forming process, different stresses are recorded through reactions and phase change, and the formed nickel silicide is enabled to apply a pulling stress to a channel of the NMOS and a pressing stress to a channel of the PMOS, so that negative effect caused by introduction of a stress layer is prevented in the metal silicide forming process, and the device performance is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor integrated circuit manufacturing, and more specifically, to a method for forming nickel silicide using stress technology. Background technique [0002] In semiconductor manufacturing technology, metal silicide is widely used in source / drain contacts and gate contacts to reduce contact resistance due to its low resistivity and good adhesion with other materials. Metals with high melting points such as Ti, Co, Ni, etc. can react with silicon to form metal silicides with low resistivity through one-step or multi-step annealing process. With the continuous improvement of the semiconductor process level, especially at the technology node of 45nm and below, in order to obtain lower contact resistance, nickel and nickel alloys (such as NiPt) have become the main materials for forming metal silicides. [0003] As the miniaturization of the feature size of VLSI continues, the size of field effect tr...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/318H01L21/336
CPCH01L21/02107H01L29/66477
Inventor 鲍宇
Owner SHANGHAI HUALI MICROELECTRONICS CORP