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Semiconductor structure and preparation method thereof

A semiconductor and structural layer technology, applied in the field of semiconductor structures and their preparation, can solve the problems of optical and electrical losses at the bonding interface, reduce the efficiency of solar cells, low bonding strength, etc., so as to improve the bonding strength, improve electrical efficiency, The effect of reducing electrical losses

Active Publication Date: 2015-10-14
SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Therefore, in bonded multi-junction solar cells, the problem of low bonding strength and light and electrical loss at the bonding interface often occurs, thereby reducing the efficiency of solar cells.

Method used

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  • Semiconductor structure and preparation method thereof
  • Semiconductor structure and preparation method thereof
  • Semiconductor structure and preparation method thereof

Examples

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preparation example Construction

[0052] refer to image 3 , the method for preparing the above-mentioned semiconductor structure is introduced below, and the method includes steps:

[0053] S101, providing a first semiconductor wafer 1 and preparing a first bonding layer 11 on the bonding surface of the first semiconductor wafer 1;

[0054] S102, providing a second semiconductor wafer 2 and preparing a second bonding layer 21 on the bonding surface of the second semiconductor wafer 2;

[0055] S103, preparing a nanohole array structure layer 3 on the first bonding layer 11 and / or the second bonding layer 21;

[0056] S104, bonding the first bonding layer 11 toward the second bonding layer 21 to form the semiconductor structure; wherein, the first bonding layer 11 and the second bonding layer 21 pass through the nanohole array structure layer 3 bonded.

[0057] refer to Figure 4 , taking the preparation of the nanohole array structure layer 3 on the first bonding layer 11 as an example, the steps of prepa...

Embodiment 1

[0067] This specific embodiment is illustrated by taking GaAs single-junction solar cells and InGaAs single-junction solar cells through bonding and cascading to form a double-junction cascaded solar cell as an example. Such as Figure 5 As shown, the first semiconductor wafer 1 is a GaAs single-junction solar cell wafer, the second semiconductor wafer 2 is an InGaAs single-junction solar cell wafer, and the semiconductor structure obtained by bonding is a GaAs / InGaAs double-junction cascaded solar cell. in,

[0068] GaAs solar cell wafers include sequentially stacked n + type GaAs cover layer 101, n-type AlInP window layer 102, n-type GaAs emitter region 103, p-type GaAs base region 104 and p-type GaInP back field layer 105; the first bonding layer 11 is p + type GaAs material layer located on the p-type GaInP back field layer 105 .

[0069] The InGaAs solar cell wafer includes a p-type InP substrate 201, a p-type InP back field layer 202, a p-type InP 0.53 GaAs base regi...

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Abstract

The invention discloses a semiconductor structure. The semiconductor structure comprises a first semiconductor wafer and a second semiconductor wafer which are bonded to each other, wherein a structure layer is arranged between the first semiconductor wafer and the second semiconductor wafer, and multiple nanopores are distributed in the structure layer. The invention further discloses a semiconductor device. The semiconductor device comprises the semiconductor structure and the semiconductor is a laser, a detector or a solar battery. The invention also discloses a preparation method of the semiconductor structure. According to the invention, through arranging the nanopore array structure layer in a bonding interface, the optical loss and the electric loss of the bonding interface are inhibited, and the bonding strength is enhanced.

Description

technical field [0001] The invention relates to the technical field of semiconductor device processing, in particular to a semiconductor structure and a preparation method thereof. Background technique [0002] The goal of a new generation of optoelectronic devices is to realize the integration and miniaturization of optoelectronics, but the compatibility of lattice-mismatched heterogeneous semiconductor materials has become one of the most important obstacles on the way to optoelectronic integration. Using bonding technology to bond heterojunction semiconductor materials together to prepare various semiconductor devices such as lasers, detectors, and solar cells has attracted more and more attention. Wafer bonding technology refers to two flat wafers, after surface cleaning and surface treatment, after crystal orientation alignment, bonding, heat treatment, and finally the bonding interface of the two wafers is chemically bonded together. This technology has great freedom ...

Claims

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Application Information

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IPC IPC(8): H01L23/482H01L31/043H01L21/60
CPCY02E10/50
Inventor 陈俊霞边历峰陆书龙
Owner SUZHOU INST OF NANO TECH & NANO BIONICS CHINESE ACEDEMY OF SCI
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