Formation method of transistor

Abstract

The invention provides a formation method of a transistor. The formation method of a transistor comprises providing a substrate, wherein a pseudo-grid is arranged on the substrate; forming an interlayer dielectric layer covered on the surface of the substrate and the surface of the side wall of the pseudo-grid, wherein the top of the interlayer dielectric layer flushes with the surface of the top of the pseudo-grid; forming a mask layer on the surface of the interlayer dielectric layer, wherein the mask layer exposes the surface of the top of the pseudo-grid; taking the mask layer to remove the pseudo-grid for mask layer etching, and forming a groove in the interlayer dielectric layer wherein a root defect is formed on the surface of the side wall of the bottom of the groove; and utilizing a dry etching process to remove the root defect. The formation method of a transistor utilizes the dry etching process to remove the root defect after removing the pseudo-grid so as to improve the morphology, of the grid, formed in the groove subsequently and optimize the electrical performance of a formed transistor.

Description

technical field [0001] The invention relates to the technology in the field of semiconductor manufacturing, in particular to a method for forming a transistor. Background technique [0002] The main semiconductor device of an integrated circuit, especially a very large scale integrated circuit, is a metal-oxide-semiconductor field effect transistor (MOS transistor). With the continuous development of integrated circuit manufacturing technology, the technology node of semiconductor devices is continuously reduced, and the geometric size of transistors is continuously reduced following Moore's law. When the size of the transistor is reduced to a certain extent, various secondary effects caused by the physical limit of the transistor appear one after another, and it becomes more and more difficult to scale down the feature size of the transistor. Among them, in the field of transistor and semiconductor manufacturing, the most challenging thing is how to solve the problem of la...

AI Technical Summary

Problems solved by technology

[0004] Although the introduction of a high-k metal gate can reduce the leakage current of the transistor to a certain extent, the electrical performance of the transistor formed by the prior art still needs to be improved due to the difficulty in controlling the formation process of the transistor.

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