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Multilayer circuit and method of making the same

A lower layer, metal layer technology, applied in the direction of circuit, printed circuit, final product manufacturing, etc., can solve environmental hazards and other problems

Active Publication Date: 2020-03-13
INT BUSINESS MASCH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, such chemicals are harmful to the environment

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  • Multilayer circuit and method of making the same
  • Multilayer circuit and method of making the same

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Embodiment Construction

[0014] The present invention relates to semiconductor structures, and more particularly, to multilayer substrates and methods of design and fabrication that use metal layers as moisture diffusion barriers to improve electrical performance. More specifically, the multilayer substrate design of the present invention improves electrical performance by preventing degradation of electrical performance due to moisture intrusion through one or more vias in the substrate cladding (eg, outer metal layer). In a specific embodiment, a multilayer substrate is used with ultra-low coefficient of thermal expansion (CTE) organic circuitry to control insertion loss by slowing the diffusion of moisture to underlying signal lines.

[0015] In an embodiment, the multilayer substrate utilizes an engineered lateral offset between planar openings (eg, vias in upper metal layers) and signal lines (also referred to as signal traces) to prevent moisture from propagating to underlying signal lines . To...

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Abstract

Multilayer circuits and methods of making the same are disclosed. Multilayer substrates and methods of design and fabrication using metal layers as moisture diffusion barriers to reduce electrical performance degradation over time after exposure to moisture. The method includes: determining a diffusion rate of an insulator material disposed between an upper metal layer and a lower layer signal line; and calculating a planar opening of the upper metal layer and the The lateral offset distance between the underlying signal lines and the lateral offset distance is used to determine the target insertion loss degradation over time.

Description

technical field [0001] The present invention relates to semiconductor structures, and more particularly, to multilayer substrates and methods of design and fabrication that use metal layers as moisture diffusion barriers to reduce degradation of electrical performance over time after exposure to moisture. Background technique [0002] In electronic device manufacturing, electronic packaging is one of the final stages of semiconductor device manufacturing. The trend in the circuit packaging industry is to use ultra-low CTE organic materials in the substrate for packaging. However, it has been found that organic materials are sensitive to moisture which can lead to degradation of electrical performance within the circuit due to insertion loss. That is, moisture can enter the package body and propagate to the underlying signal lines, which will degrade electrical performance. This is also known as insertion loss due to moisture. [0003] In order to avoid such deterioration ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/392H01L23/528G06F113/18
CPCH01L23/5283G06F30/392G06F2113/18H01L2924/0002H01L23/145H01L23/49827Y02E10/549H01L23/49822H01L23/564G06F30/39Y02P70/50H10K10/88H10K30/88H01L2924/00H05K1/0353H10K50/844
Inventor J·奥代特E·D·布莱克希尔福井雅弘C·L·雷诺兹寺田健司山田智之
Owner INT BUSINESS MASCH CORP