A method for preparing thick layer epitaxy on thin SB substrate for vdmos device

A substrate and device technology, applied in the field of silicon epitaxial layer preparation process for VDMOS devices, can solve the problems of increased difficulty in controlling epitaxial thickness uniformity, increased epitaxial debris rate, chipping, slip lines, etc., and achieve edge crystallization quality Good, improve processing yield, good effect of thickness uniformity

Active Publication Date: 2018-10-19
CHINA ELECTRONICS TECH GRP NO 46 RES INST +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But at the same time, due to the reduction of the substrate thickness, the epitaxial growth fluid model and crystal stress distribution will be different, and the uniformity of the epitaxial thickness and the difficulty of defect control will be greatly increased. In view of the fact that the growth rate of the epitaxial edge is higher than that of the center, When growing thick epitaxy, due to the long growth time and the continuous accumulation of extrusion stress caused by thermal history, it is very easy to have defects such as "epitaxial crown", chipping, and slip lines on the edge of the epitaxy. In the subsequent device process , the edge cracks continue to expand and extend, resulting in a large increase in the rate of epitaxial fragmentation, especially the stress and damage problems on the main reference edge are more prominent, which has an extremely adverse impact on subsequent device process equipment and process control

Method used

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  • A method for preparing thick layer epitaxy on thin SB substrate for vdmos device
  • A method for preparing thick layer epitaxy on thin SB substrate for vdmos device
  • A method for preparing thick layer epitaxy on thin SB substrate for vdmos device

Examples

Experimental program
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Effect test

Embodiment 1

[0022] Step 1: The bottom end of the induction coil under the graphite base of the epitaxial furnace has 9 groups of adjustable distance adjustment rods, named 4#~12# respectively. The position of the coil is raised or lowered by rotating the adjustment rod to adjust the coil The distance between each part and the graphite base of the epitaxial furnace improves the temperature uniformity of the graphite base of the epitaxial furnace. The scale value of the 4# adjustment rod is set to -10, and the scale value of the 5# adjustment rod is set to- The scale value of 15, 6# adjustment rod is set to -30, the scale value of 7# adjustment rod is set to -30, the scale value of 8# adjustment rod is set to 0, and the scale value of 9# adjustment rod is set to The scale value of -30, 10# adjustment rod is set to -30, the scale value of 11# adjustment rod is set to +3, and the scale value of 12# adjustment rod is set to +3.

[0023] Step 2: Use hydrogen chloride (HCl) to etch and polish the g...

Embodiment 2

[0032] Step 1: The bottom end of the induction coil under the graphite base of the epitaxial furnace has 9 groups of adjustable distance adjustment rods, named 4#~12# respectively. The position of the coil is raised or lowered by rotating the adjustment rod to adjust the coil The distance between each part and the graphite base of the epitaxial furnace to improve the temperature uniformity of the graphite base of the epitaxial furnace. The scale value of the 4# adjustment rod is set to -8, and the scale value of the 5# adjustment rod is set to- The scale value of 13,6# adjustment rod is set to -28, the scale value of 7# adjustment rod is set to -28, the scale value of 8# adjustment rod is set to +2, and the scale value of 9# adjustment rod is set For -29, the scale value of 10# adjusting rod is set to -30, the scale value of 11# adjusting rod is set to +2, and the scale value of 12# adjusting rod is set to +2.

[0033] Step 2: Use hydrogen chloride gas (HCl) to polish the graphit...

Embodiment 3

[0042] Step 1: The bottom end of the induction coil under the graphite base of the epitaxial furnace has 9 groups of adjustable distance adjustment rods, named 4#~12# respectively. The position of the coil is raised or lowered by rotating the adjustment rod to adjust the coil The distance between each part and the graphite base of the epitaxial furnace, thereby improving the temperature uniformity of the graphite base of the epitaxial furnace, the scale value of 4# adjusting rod is set to -7, and the scale value of 5# adjusting rod is set to- The scale value of 13,6# adjustment rod is set to -28, the scale value of 7# adjustment rod is set to -30, the scale value of 8# adjustment rod is set to +2, and the scale value of 9# adjustment rod is set to The scale value of -27, 10# adjustment rod is set to -27, the scale value of 11# adjustment rod is set to +1, and the scale value of 12# adjustment rod is set to +1;

[0043] Step 2: Use hydrogen chloride (HCl) to polish the graphite ba...

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Abstract

The invention relates to a method for preparing a thick epitaxial layer on a thin sb substrate for a VDMOS device. The method comprises: scale values of nine groups of adjusting rods arranged below a graphite pedestal of an epitaxial furnace are set respectively; the epitaxial furnace pedestal is processed by etching and polishing by using hydrogen chloride HC1 gas under a high temperature; a silicon substrate sheet is installed in a pit of the epitaxial furnace pedestal and the surface of the silicon substrate is polished by using the HC1 gas; sweeping is carried out on the surface of the silicon substrate sheet by using high-flow hydrogen; a thin intrinsic epitaxial layer grows on the silicon substrate sheet; a doped epitaxial layer grows; after the thickens of the doped epitaxial layer reaches a predetermined thickness, cooling is carried out; and then thicknesses of nine testing points of the epitaxial wafer are measured, thereby obtaining an average thickness value and a uniformity value of a silicon epitaxial wafer. Therefore, good control of epitaxial growth of the thin 400-micron sb substrate is realized; the nonuniformity of the thickness is less than 0.5%; defects of slip line, edge breakage, and damage existence at the edge are overcome; and the requirements on the silicon epitaxial layer of the VDMOS device are met; and the processing yield of the device is improved.

Description

Technical field [0001] The invention relates to a process technology for preparing a silicon epitaxial layer for a VDMOS device, in particular to a method for preparing a thick epitaxial layer on a thin Sb substrate for a VDMOS device. Background technique [0002] VDMOS power device is a kind of semiconductor device with high input impedance, good thermal stability, low power consumption and fast switching speed. It has been widely used in the fields of switching regulated power supply, high frequency heating, computer interface circuit and power amplifier. Applications. The VDMOS device adopts a multi-cell structure in which hundreds of repeated MOS cells are connected in parallel, which has achieved the goal of larger working current, and the quality of a single cell directly determines the performance of the device. The base material is mainly N-type Sb-doped silicon <100> The crystal orientation backs the substrate, and the good electrical properties of the cell requi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/02
CPCH01L21/02538H01L21/0262
Inventor 陈涛李明达薛兵白春磊殷海丰
Owner CHINA ELECTRONICS TECH GRP NO 46 RES INST
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