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Memory device, manufacturing method thereof, and electronic equipment including the same

A technology for storage devices and storage gates, applied in semiconductor devices, electrical solid state devices, circuits, etc., can solve problems such as difficulty in stacking multiple vertical devices, increase in channel resistance, difficulty in controlling gate length, etc., and improve device performance , increase the storage density, the effect of low leakage current

Active Publication Date: 2019-04-02
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, for vertical devices, it is difficult to control the gate length, especially for single crystal channel materials
On the other hand, if a polycrystalline channel material is used, the channel resistance is greatly increased compared to single crystal material, making it difficult to stack multiple vertical devices, as this would result in an excessively high resistance

Method used

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  • Memory device, manufacturing method thereof, and electronic equipment including the same
  • Memory device, manufacturing method thereof, and electronic equipment including the same
  • Memory device, manufacturing method thereof, and electronic equipment including the same

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Embodiment Construction

[0016] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. It should be understood, however, that these descriptions are exemplary only, and are not intended to limit the scope of the present disclosure. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present disclosure.

[0017] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity of presentation. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, ...

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PUM

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Abstract

Disclosed are a storage device, a manufacturing method thereof, and electronic equipment including the storage device. The storage device may include: a plurality of first columnar active regions and a plurality of second columnar active regions extending upward on the substrate, arranged in first and second arrays respectively, and each first columnar active region includes a source / Drain layers and channel layers are alternately stacked, the corresponding channel layers in each first columnar active region are on substantially the same plane, and the corresponding source / drain layers are on substantially the same plane, and each second The columnar active region includes an integrally extended active semiconductor layer; a columnar conductive contact part located at the lower part of each second columnar active region; an insulating layer formed around the periphery of each columnar conductive contact part; Multi-layer first storage gate stacks in substantially the same plane and respectively surrounding the periphery of each channel layer on the corresponding plane; multi-layer second storage gate stacks surrounding the periphery of each second columnar active region.

Description

technical field [0001] The present disclosure relates to the field of semiconductors, and in particular, to a storage device based on a vertical type device, a manufacturing method thereof, and an electronic device including the storage device. Background technique [0002] In a horizontal type device such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the source, gate and drain are arranged in a direction substantially parallel to the surface of the substrate. Due to this arrangement, the horizontal type device cannot be easily further scaled down. Unlike this, in a vertical type device, the source, gate, and drain are arranged in a direction substantially perpendicular to the substrate surface. Therefore, vertical devices are easier to scale down than horizontal devices. [0003] However, for vertical devices, it is difficult to control the gate length, especially for single crystal channel materials. On the other hand, if a polycrystalline channel mat...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11517H01L27/11551H01L27/11563H01L27/11578H01L27/11585H01L27/11597
CPCH10B41/00H10B41/20H10B69/00H10B51/00H10B51/20
Inventor 朱慧珑
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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