Substrate and manufacturing method thereof

A manufacturing method and substrate technology, which are used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc.

Active Publication Date: 2017-05-03
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] The invention provides a substrate and its manufacturing method to solve the problem in the prior art that it is diffi

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  • Substrate and manufacturing method thereof
  • Substrate and manufacturing method thereof
  • Substrate and manufacturing method thereof

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Experimental program
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Embodiment 1

[0064] In this embodiment, the auxiliary substrate 100 and the supporting substrate 200 are bulk silicon substrates, the aspect ratio of the opening of the defect elimination structure 110 is 5:1, and the length of the opening runs through the entire substrate. Cuboid on the surface, the width of the opening is 100nm, the opening period is 0.5 μm to 1 μm, the surface of the defect elimination structure 110 is germanium; the epitaxial layer 101 is a germanium layer, and the passivation layer 102 is a hafnium oxide film, The buried dielectric layer 201 is a silicon dioxide film, refer to Figure 3G As shown, the method includes:

[0065] Step S01, providing an auxiliary substrate 100 and a supporting substrate 200, the auxiliary substrate 100 at least including a defect elimination structure 110, an epitaxial layer 101 on the defect elimination structure 110, and a passivation layer on the epitaxial layer 101 layer 102, the support substrate 200 at least includes a buried diele...

Embodiment 2

[0093] The substrate manufacturing method is as described in Embodiment 1, the difference is that in this embodiment, the auxiliary substrate 100 is a silicon germanium substrate; the opening of the defect elimination structure 110 is formed in the substrate, so A buffer layer and an epitaxial layer on the buffer layer are formed in the opening; the opening is an array of cylinders with a diameter of 100 nm, the aspect ratio of the opening is 3:1, and the period of the opening is 0.5 μm -1 μm; the dielectric layer is a silicon nitride film; the passivation layer 102 is an aluminum oxide film with a thickness of 5-10 nm; the buried dielectric layer 201 is formed by a thermal oxygen method, such as Figure 4A to Figure 4G shown.

[0094] Step S11, providing an auxiliary substrate 100 and a supporting substrate 200, the auxiliary substrate 100 at least including a defect elimination structure 110, an epitaxial layer 101 on the defect elimination structure 110, and a passivation l...

Embodiment 3

[0109]The substrate manufacturing method is as described in Embodiment 1, except that the epitaxial layer 101 is a germanium-tin layer; the auxiliary substrate 100 includes the epitaxial layer 101 and the passivation layer on the epitaxial layer 101 102 and the oxide substance layer 103 on the passivation layer 102; the support substrate 200 is a sapphire substrate; the opening of the defect elimination structure 110 is jointly formed by a dielectric layer and a substrate, and a The buffer layer and the epitaxial layer on the buffer layer; the opening is an array of cubes with a side length of 100nm, and the aspect ratio of the opening is 7:1; the passivation layer 102 is 5-10nm in thickness Al2O3 thin film, such as Figure 5A to Figure 5F shown.

[0110] Step S21, providing an auxiliary substrate 100 and a supporting substrate 200, the auxiliary substrate 100 at least including a defect elimination structure 110, an epitaxial layer 101 on the defect elimination structure 110...

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Abstract

The invention provides a substrate and a manufacturing method thereof. The method comprises steps: an auxiliary substrate and a supporting substrate are provided, wherein at least a defect elimination structure, an epitaxial layer above the defect elimination structure and a passivation layer above the epitaxial layer are arranged on the auxiliary substrate, and at least a buried dielectric layer is arranged on the supporting substrate; the auxiliary substrate is bonded on the supporting substrate; the auxiliary substrate is removed; and chemical-mechanical planarization (CMP) is carried out until the epitaxial layer reaches a specified thickness. As defects of the epitaxial layer can be reduced by the defect elimination structure and damages of the epitaxial layer during the bonding process can be effectively reduced by the passivation layer, a large amount of defects can be prevented from being generated in the epitaxial layer, and the performance and the reliability of using the epitaxial layer to manufacture a device can be enhanced.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a substrate and a manufacturing method thereof. Background technique [0002] With the continuous development of the integrated circuit industry, how to reduce the substrate leakage current has increasingly become the focus of research. Among them, using a silicon-on-insulator (SOI) substrate, so that the formed semiconductor device is located on the insulator, and avoiding the leakage current between the semiconductor device and the substrate is recognized as the best way. [0003] In addition, with the continuous reduction of the size of semiconductor devices, it is necessary to improve the device performance by enhancing the channel carrier mobility, for example, by replacing silicon with semiconductor materials with high carrier mobility such as silicon germanium and germanium. Enhanced channel carrier mobility. Some people have proposed the structure of manufactu...

Claims

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Application Information

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IPC IPC(8): H01L21/762
CPCH01L21/76251
Inventor 王桂磊亨利·H·阿达姆松罗军李俊峰赵超
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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