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Field plate structure and preparation method of a radio frequency vdmos transistor

A transistor and field plate technology, which is applied in the field plate structure and preparation field of radio frequency VDMOS, can solve the problems of limiting the high frequency application of VDMOS, and achieve the effects of increasing device reliability, improving high frequency characteristics, and reducing interface electric field

Active Publication Date: 2020-05-08
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, the current two technical solutions have certain limitations, which limit the high-frequency application of VDMOS

Method used

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  • Field plate structure and preparation method of a radio frequency vdmos transistor
  • Field plate structure and preparation method of a radio frequency vdmos transistor
  • Field plate structure and preparation method of a radio frequency vdmos transistor

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0032] (1) On the N+ silicon substrate N- epitaxial layer, thermally grown SiO 2 Dielectric layer, LPCVD deposition Si 3 N 4 medium layer;

[0033] (2) Photolithography and dry etching with a length of 22 μm in the middle Si 3 N 4 dielectric layer and SiO 2 Dielectric layer, and then use dilute HF solution to etch the rest of the middle position SiO 2 , with solution III (H 2 SO 4 and H 2 o2 Mixed according to the volume ratio of 4:1) to remove all photoresist; (3) in SiO 2 and Si 3 N 4 Wet oxygen growth of 1 μm tapered oxide layer in the middle window of the dielectric layer;

[0034] (4) Corrode all remaining Si with phosphoric acid and BHF respectively 3 N 4 dielectric layer and SiO 2 medium layer;

[0035] (5) Thermal growth on the surface of the silicon epitaxial layer on both sides of the tapered oxide layer gate oxide, then deposited over the gate oxide and tapered oxide Phosphorus-doped polysilicon;

[0036] (6) Photolithography and ICP et...

Embodiment 2

[0038] (1) On the N+ silicon substrate N- epitaxial layer, LPCVD deposition SiO 2 dielectric layer and Si 3 N 4 medium layer;

[0039] (2) Photolithography and dry etching with a length of 26 μm in the middle position Si 3 N 4 dielectric layer and SiO 2 Dielectric layer, remove all photoresist with solution III;

[0040] (3) on SiO 2 and Si 3 N 4 Wet oxygen growth of 1.5μm tapered oxide layer in the middle of the dielectric layer;

[0041] (4) Corrode all remaining Si with phosphoric acid and BHF respectively 3 N 4 dielectric layer and SiO 2 medium layer;

[0042] (5) Thermal growth on the surface of the silicon epitaxial layer on both sides of the tapered oxide layer Gate oxide, deposited over the gate oxide and tapered oxide Phosphorus-doped polysilicon;

[0043] (6) Photolithography and ICP etching of the phosphorus-doped polysilicon in the middle of the tapered oxide layer with a length of 18 μm and the doped polysilicon at the two sides of the tap...

Embodiment 3

[0045] (1) On the N+ silicon substrate N- epitaxial layer, PECVD deposition SiO 2 dielectric layer and Si 3 N 4 medium layer;

[0046] (2) Photolithography and dry etching with a length of 28 μm in the middle position Si 3 N 4 dielectric layer and SiO 2 Dielectric layer, remove all photoresist with solution III;

[0047] (3) on SiO 2 and Si 3 N 4 In the middle of the dielectric layer, wet oxygen grows a 1μm tapered oxide layer;

[0048] (4) Corrode all remaining Si with phosphoric acid and BHF respectively 3 N 4 dielectric layer and SiO 2 medium layer;

[0049] (5) Thermal growth on the surface of the silicon epitaxial layer on both sides of the tapered oxide layer Gate oxide, deposited over the gate oxide and tapered oxide Phosphorus-doped polysilicon;

[0050] (6) Photolithography and ICP etch the phosphorous-doped polysilicon in the middle of the tapered oxide layer with a length of 20 μm and the doped polysilicon at the two sides of the tapered oxi...

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Abstract

The invention relates to a field plate structure of a radio-frequency vertical double-diffused metal oxide semiconductor (VDMOS) transistor and a preparation method of the field plate structure. The field plate structure is characterized in that a taper oxide layer is formed at a middle position of a surface of an epitaxial layer of a silicon substrate, and a structure of which grids and field plates are separated is formed by selective etching on doped poly-silicon covering the epitaxial layer and the taper oxide layer, the field plates are arranged on the taper oxide layer, and the grids are arranged at two sides of the taper oxide layer. With the structure of which the grids and the field plates are separated proposed by the invention, the grid leakage feedback capacitance caused by the field plate is reduced, the high-frequency characteristic of a device is improved, and the field plate structure is suitably used for application of a P-band VDMOS; the taper oxide layer under the field plate is beneficial for reducing an interface electric field, the reliability of the device is improved, the distances between the grids and the field plates are easy to control and are relatively good in symmetry, and the protection performance of the field plate is improved; and moreover, the field plate structure is completely compatible with a conventional VDMOS process, the grid and field plate structure is simultaneously formed, and no extra process is added.

Description

technical field [0001] The invention belongs to the technical field of design and manufacture of semiconductor microelectronics, and in particular relates to a field plate structure of a radio frequency VDMOS and a preparation method thereof. Background technique [0002] With the rapid development of VLSI technology, the manufacturing technology of high-voltage and high-frequency semiconductor devices has improved, and a number of new power amplifier devices have been born. The most representative product is the VDMOS field effect power transistor. . In the field of microwave technology, radio frequency VDMOS devices are more and more widely used in power switches. The switching speed of the RF VDMOS device mainly depends on the charging and discharging of the internal capacitance of the device, and the withstand voltage of the device depends on the source-drain breakdown voltage of the device. In order to continuously improve the performance of the RF VDMOS, the design i...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/40H01L29/78H01L21/336
CPCH01L29/402H01L29/404H01L29/66712H01L29/7802
Inventor 赵杨杨刘洪军庸安明应贤炜
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD