Manufacturing method of enhanced P type gate GaN HEMT device

A manufacturing method and enhanced technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high difficulty and inconspicuous realization, and achieve reduced current collapse, stable chemical properties, and process compatibility high effect

Inactive Publication Date: 2017-09-19
CHENGDU HIWAFER SEMICON CO LTD
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Problems solved by technology

However, the above method is difficult to realize in the process, and it is not obvious to the

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  • Manufacturing method of enhanced P type gate GaN HEMT device
  • Manufacturing method of enhanced P type gate GaN HEMT device
  • Manufacturing method of enhanced P type gate GaN HEMT device

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Embodiment Construction

[0026] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. For simplicity, some technical features known to those skilled in the art are omitted from the following description.

[0027] like figure 1 As shown, the GaN HEMT structure of this embodiment includes a substrate, an AlN nucleation layer, a GaN buffer layer, an AlN insertion layer, and an AlGaN barrier layer from bottom to top. There is a P-type GaN layer on the AlGaN barrier layer. The manufacturing method of the P-type gate GaN HEMT device comprises the following steps:

[0028] S1. Form a P-type GaN gate protection region 1 on the GaN HEMT structure with a P-type GaN layer on the surface, such as figure 2 shown;

[0029] Step S1 is specifically: using AZ5214 photoresist as a protective mask, forming a protective mask of the gate...

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Abstract

The invention relates to the semiconductor device manufacturing technology field, and more specifically relates to a manufacturing method of an enhanced P type gate GaN HEMT device. The method comprises the following steps: S1, forming a P type GaN gate protection region on a GaN HEMT structure the surface of which contains a P type GaN layer; S2, preparing a source electrode and a drain electrode; S3, forming active isolation regions on the GaN HEMT structure having the source electrode and the drain electrode; S4, opening a region between the source electrode and the drain electrode through lithography development, forming a layer of metal Ni on the surface of the GaN HEMT structure through deposition, and peeling the metal Ni off the tops of the source electrode and the drain electrode; S5, carrying out oxidation treatment on the GaN HEMT structure with the metal Ni peeled off, and oxidizing the metal Ni to form an NiO dielectric layer; S6, opening the gate protection region through lithography development, and preparing a gate in the gate protection region; and S7, thickening the gate, the source electrode and the drain electrode. Current collapse of the device can be reduced effectively.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a method for manufacturing an enhanced P-type gate GaN HEMT device. Background technique [0002] Because of its wide band gap, GaN materials make GaN HEMT devices based on them have high breakdown voltage, high current density and low on-resistance, and are the core devices of modern power transmission systems. The primary condition for GaNHEMT as a power electronic device is an enhanced working mode. The hot spot in the scientific research and industry circles is the GaN HEMT device with a P-type GaN gate. The specific method is to insert a layer between the gate metal and the AlGaN barrier layer. The P-type GaN layer raises the triangular potential well at the lower AlGaN / GaN heterojunction interface to above the Fermi level through the PN built-in electric field, thereby forming an enhanced channel. With the deepening of research, the P-type G...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/335H01L29/778
CPCH01L29/66462H01L29/7786
Inventor 林书勋
Owner CHENGDU HIWAFER SEMICON CO LTD
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