A method of fabricating a semiconductor structure

Abstract

The present invention provides a method for manufacturing a semiconductor structure, comprising the following steps: S1: providing a substrate, and forming a phosphorus-doped first polysilicon layer on the substrate; S2: forming a first polysilicon layer on the surface of the first polysilicon layer Forming a non-doped polysilicon layer; S3: forming a phosphorus-doped second polysilicon layer on the surface of the non-doped polysilicon layer; S4: performing annealing so that the first polysilicon layer and the second polysilicon layer A portion of the phosphorous in the layer diffuses into the non-doped polysilicon layer. In the present invention, the non-doped polysilicon layer can be obtained by stopping phosphorus doping in the later stage of forming the first polysilicon layer, and the process is simple and feasible. The non-doped polysilicon layer can effectively block the precipitation of phosphorus in the first polysilicon layer, thereby avoiding the formation of bump defects, and effectively reducing the bumps at the interface between the first polysilicon layer and the second polysilicon layer or inside probability of defects. The annealing step can finally transform the DUD structure into a complete DD structure without affecting device performance.

Description

technical field [0001] The invention belongs to the field of integrated circuit manufacturing and relates to a method for manufacturing a semiconductor structure. Background technique [0002] NAND-flash memory is a kind of flash memory. It adopts nonlinear macrocell mode inside, which provides a cheap and effective solution for the realization of solid-state large-capacity memory. Nand-flash memory has the advantages of large capacity and fast rewriting speed, and is suitable for the storage of large amounts of data, so it has been more and more widely used in the industry. For example, embedded products include digital cameras, MP3 walkman memory cards, volume Small U disk, etc. [0003] Currently, the control gate loop (CG loop) of 38nm NAND-flash suffers from bump defects due to its own manufacturing process. First of all, due to its own manufacturing process, the doping concentration of "P" (phosphorus) in the control gate ring is particularly high, and the doping con...

AI Technical Summary

Problems solved by technology

[0007] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a method for manufacturing a semiconductor structure, which is used to solve the problem in the prior art that bump defects have adverse effects on subsequent processes

Images