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A laterally diffused metal oxide semiconductor ldmos device and its layout

An oxide semiconductor and device technology, applied in semiconductor devices, electrical components, circuits, etc., can solve problems such as device failure, and achieve the effect of weakening the electric field concentration effect, improving market competitiveness, and improving product reliability.

Inactive Publication Date: 2020-10-13
PEKING UNIV FOUNDER GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides a laterally diffused metal oxide semiconductor LDMOS device and its layout, the purpose of which is to solve the problem that LDMOS will cause device failure due to the electric field concentration effect

Method used

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  • A laterally diffused metal oxide semiconductor ldmos device and its layout
  • A laterally diffused metal oxide semiconductor ldmos device and its layout
  • A laterally diffused metal oxide semiconductor ldmos device and its layout

Examples

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no. 1 example

[0047] see figure 1 , the first embodiment of the present invention provides a laterally diffused metal oxide semiconductor LDMOS device, including: a P-type substrate;

[0048] A depletion region 101 formed on a P-type substrate;

[0049] The depletion region 101 includes at least two straight regions 103 arranged in sequence along the first direction 102 and a transition region 104 connecting the two straight regions 103 at one end of the straight region 103, the transition region 104 is usually an electric field concentration region; wherein,

[0050]The two straight areas 103 include: a first straight area 105 and a second straight area 106, the distance between the first boundary 107 of the first straight area 105 and the second boundary 108 of the second straight area 106 is the first preset Assuming a distance, the first boundary 107 is a boundary away from the second straight region 106, and the second boundary 108 is a boundary far away from the first straight region...

no. 2 example

[0061] see Figure 7 , the second embodiment of the present invention provides a layout structure of a laterally diffused metal oxide semiconductor LDMOS device, including a depletion region 201 corresponding to the depletion region of the LDMOS device, specifically, the depletion region is transparent Photoregion for local selective oxidation (LOCOS) of LDMOS devices.

[0062] The depletion region portion 201 includes at least two straight region portions 203 arranged in sequence along the first direction and a transition region portion 204 connecting the two straight region portions 203 at one end of the straight region portion 203; wherein,

[0063] The two straight area portions 203 are respectively a first straight area portion 205 and a second straight area portion 206, and the distance between the first boundary of the first straight area portion 205 and the second boundary of the second straight area portion 206 is The first preset distance, the first boundary is the ...

no. 3 example

[0075] The third embodiment briefly describes the process flow of the LDMOS device provided by the present invention as follows:

[0076] first step, see Figure 7 , On the P-type 100 crystal orientation 80ohm-cm resistivity substrate (P sub), firstly use the local oxidation LOCOS process to make field oxygen (FOX).

[0077] The second step, see Figure 8 , sequentially perform photolithography, implantation, glue removal, and well pushing on the substrate to form the device depletion region (HVNW) and channel region (PW).

[0078] The third step, see Figure 9 , performing polycrystalline (POLY) deposition, photolithography, and etching in sequence to form a gate (Gate) region.

[0079] The fourth step, see Figure 10 , perform source (Source) N+ and Drain contact N+ implantation to form the core cross-sectional structure of LDMOS. In the cross-sectional structure, A is the depletion region, 700V products are usually 65um, and B is the Drain contact region.

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Abstract

The invention provides a laterally diffused metal oxide semiconductor (LDMOS) device and layout. The LDMOS device comprises a P-type substrate and a depletion region, wherein the depletion region is formed on the P-type substrate and comprises at least two straight regions and a transition region, the at least two straight regions are sequentially arranged along a first direction, the transition region is used for connecting the two straight regions at one end of each straight region, the two straight regions comprise a first straight region and a second straight region, the distance between a first boundary of the first straight region and a second boundary of the second straight region is a first preset distance, the transition region comprises a third boundary and a fourth boundary, the third boundary is parallel to the first boundary and is connected with the first boundary, the fourth boundary is parallel to the second boundary and is connected with the fourth boundary, the distance between the fourth boundary and the third boundary is a second preset distance, and the first preset distance is smaller than the second preset distance. By the LDMOS device, the problem of LDMOS device failure caused by a concentrated effect of an electric field is solved, the product reliability is improved, and the market competitiveness is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a lateral diffusion metal oxide semiconductor LDMOS device and layout. Background technique [0002] Laterally Diffused Metal Oxide Semiconductor (LDMOS) is an essential basic device for power integrated circuits (Integrated Circuit, IC). According to the withstand voltage, it can be divided into high voltage and low voltage. complex. [0003] Generally, if a silicon semiconductor device is to achieve a high withstand voltage value, a longer depletion region is required, but a longer depletion region will increase the on-resistance (Rdson) of the device. An ideal device has a high withstand voltage and On-resistance is low, but usually the two are in conflict. Taking LDMOS with a withstand voltage of 700V as an example, LDMOS with a withstand voltage of 700V often appears in power management chips (Power ICs) such as AC-DC and LED Drivers. The withstand voltage is determ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/0684H01L29/7816
Inventor 杜蕾
Owner PEKING UNIV FOUNDER GRP CO LTD
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