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Silicon carbide MOS structure gate oxide preparation method and silicon carbide MOS structure preparation method

A technology of MOS structure and silicon carbide, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problem of low channel mobility, increase oxidation degree, increase channel mobility, and improve interface state density Effect

Active Publication Date: 2017-12-05
HUNAN UNIV
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Problems solved by technology

[0003] However, silicon carbide devices have always had the problem of low channel mobility. This problem is mainly caused by the lattice structure and high interface state density of the oxygen gate in the silicon carbide MOS structure. Therefore, the preparation of gate oxygen in the silicon carbide MOS structure The method and the corresponding post-oxidation treatment process are the key steps to limit the performance of SiC-based MOSFET devices.
[0004] At present, there is no method that can effectively improve the lattice structure and interface state density of the oxygen gate in the silicon carbide MOS structure, and improve the channel mobility of silicon carbide devices.

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Embodiment Construction

[0021] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0022] figure 1 The schematic flow chart of the silicon carbide MOS structure gate oxide preparation method provided by the embodiment of the present invention, as shown in figure 1 shown, including:

[0023] S10, in the first chamber, pass the silicon carbide epitaxial wafer into a silane atmosphere at a temperature of T1 for t1 minutes, so tha...

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Abstract

The invention provides a silicon carbide MOS structure gate oxide preparation method and a silicon carbide MOS structure preparation method. The silicon carbide MOS structure gate oxide preparation method comprises steps that S10, a silicon carbide epitaxial wafer is put into a silane atmosphere with temperature of T1 for t1 minutes in a first chamber, and a silicon film layer is formed on the surface of silicon carbide; S20, in a second chamber, low temperature thermooxidizing of the silicon film layer in the oxygen atmosphere with temperature of T2 is carried out for t2 minutes, and a silicon dioxide layer is formed through oxidation of the silicon film layer; and S30, the S10 and the S20 are repeated till thickness of the silicon dioxide layer reaches a preset threshold. The method is advantaged in that through multiple times of silicon film formation and silicon film oxidation to form the silicon dioxide layer, the silicon dioxide layer with the required thickness is formed, the oxidation degree of gate oxide of the silicon carbide MOS structure is effectively improved, SiC / SiO2 interface state density is improved, and channel mobility and reliability of the silicon carbide device MOS structure are improved.

Description

technical field [0001] The embodiments of the present invention relate to the field of semiconductor technology, and in particular to a method for preparing a silicon carbide MOS structure gate oxide and a method for preparing a silicon carbide MOS structure. Background technique [0002] Silicon carbide is currently the most mature wide-bandgap semiconductor material. Compared with other semiconductor materials, silicon carbide has the advantages of high bandgap width, high saturation electron drift velocity, high breakdown strength, low dielectric constant and high thermal conductivity. . Therefore, silicon carbide is an ideal material for high-temperature, high-frequency, and high-power applications. Under the same withstand voltage and current conditions, the drift region resistance of silicon carbide devices is 200 times lower than that of silicon, and even the conduction voltage drop of high withstand voltage silicon carbide MOSFETs is lower than that of unipolar and ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/04H01L21/02
CPCH01L21/02164H01L21/02238H01L21/049
Inventor 王俊刘燕兰梁世维
Owner HUNAN UNIV
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