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Array substrate and manufacturing method thereof

A technology of an array substrate and a manufacturing method, which is applied to the manufacturing field of array substrates and array substrates, can solve problems such as easy cracking and layer structure deformation, and achieve the effects of improving flexibility, preventing cracking, and simplifying process steps.

Inactive Publication Date: 2017-12-08
SHENZHEN ROYOLE TECH CO LTD
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  • Application Information

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Problems solved by technology

Due to the limitations of the characteristics of the gate insulating layer itself and the preparation conditions, there is usually internal stress inside the gate insulating layer, and the brittle SiO x 、SiN x The gate insulating layer made of other materials is easy to break under the action of internal stress; especially, in flexible displays, the existence of internal stress will also lead to deformation of the flexible substrate, gate insulating layer and other layer structures in thin film transistors

Method used

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  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof

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preparation example Construction

[0094] see Figure 12 , Figure 12 It is a flow chart of the method for preparing an array substrate in the first preferred embodiment of the present invention, please refer to Figures 13A-13G , the preparation method of the array substrate comprises:

[0095] Step S1210 : forming a signal transmission line 120 and a gate 130 on the substrate 110 , with a gap between the signal transmission line 120 and the gate 130 . See Figure 13A .

[0096] Specifically, a metal layer, such as a gold (Au) layer, can be deposited on the substrate 110 by physical vapor deposition, and the metal layer is patterned through a photomask and etching process to form the signal transmission line 120 and the gate 130 .

[0097] In this embodiment, after the step S120, the method further includes: forming a buffer layer 210, the buffer layer 210 is disposed on the first surface of the substrate 110, and the signal transmission line 120 is disposed on the buffer layer 210 away from the surface o...

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Abstract

The array substrate includes a substrate, a signal transmission line, a gate electrode, an insulation layer, an active layer, a first electrode and a second electrode, A second electrode and a third electrode, wherein the first insulating layer includes a first insulating portion and a second insulating portion, and the first insulating portion and the second insulating portion cover the first insulating portion of the signal transmission line, Isolation trenches 1401 are provided between the second insulation portions of the gate 130 to release internal stress in the first insulation layer 140 to prevent brittle insulation The layer (140) is easily broken under the effect of internal stress to reduce the deformation of the layer structure of the flexible substrate (110) and the insulating layer (140) in the thin film transistor and improve the flexibility of the array substrate. The isolation trench (1401) and the through hole (1402) for connecting the first electrode (1601) and the signal transmission line (1201) may be formed through a photomask and an etching process to simplify the process steps of the array substrate and reduce the production cost.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to an array substrate and a method for manufacturing the array substrate. Background technique [0002] As a thin film transistor (thin film transistor, TFT) is widely used as a switching element in electronic display devices such as liquid crystal display (Liquid Crystal Display, LCD) and organic laser display (Organic Light-Emitting Diode, OLED). Thin film transistors generally include gate, gate insulating layer, active layer, source and drain, etc. Among them, high-quality gate insulating layer is an important parameter to achieve good electrical stability and small leakage current of thin film transistors. key. The gate insulating layer is mainly made of inorganic non-metallic materials, (for example, SiO x 、SiN x etc.) prepared by plasma chemical vapor deposition. Due to the limitations of the characteristics of the gate insulating layer itself and the prepa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/124H01L27/1248H01L27/1259H01L27/12H01L27/1218H01L27/1222
Inventor 袁泽余晓军古普塔阿米特赵继刚魏鹏
Owner SHENZHEN ROYOLE TECH CO LTD