A kind of manufacturing method of finfet device

Abstract

The invention provides a FinFET device manufacturing method, and relates to the semiconductor technical field; the method comprises the following steps: providing a semiconductor substrate, forming aplurality of fins on the semiconductor substrate, forming a hard mask layer on the fin top, and forming an isolation structure on the semiconductor substrate between the fins; executing the first threshold-voltage ion implantation, wherein the first threshold-voltage ion implantation direction is vertical to the semiconductor substrate surface; carrying out the first thermal annealing treatment; channeling to stop the ion implantation, and forming a break-through stop layer below a channel zone of the fins; removing the hard mask layer; carrying out the second threshold-voltage ion implantation, and carrying out the second thermal annealing treatment so as to activate doped impurities, thus evenly distributing the doped impurities in the fins. The FinFET device manufacturing method can prevent injection damages on the fins, thus preventing the ion implantation shadow effect caused by inclined injection, and improving the device performance and yield rate.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a method for manufacturing a FinFET device. Background technique [0002] With the continuous development of semiconductor technology, in order to improve the performance of the device, the size of integrated circuit devices needs to be continuously reduced. With the continuous reduction of the size of CMOS devices, the development of three-dimensional designs such as fin field effect transistors (FinFET) has been promoted. [0003] Compared with the existing planar transistors, the FinFET device has more superior performance in terms of channel control and reduction of short channel effects (SCE); the planar gate structure is arranged above the channel, while the FinFET The grid is arranged around the fins, so static electricity can be controlled from three sides, and the performance in static electricity control is also more prominent. [0004] At present, it is...

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Problems solved by technology

[0004] At present, it is necessary to implement multi-threshold voltage (multi-Vt) devices on the system-on-chip (SOC) 14nm FinFET, such as figure 1 As shown, a plurality of fins 101 are formed on a semiconductor substrate 100, an isolation structure 102 covering part of the fins 101 is formed on the semiconductor substrate 100, and an exposed surface of the fins 101 and the isolation structure are formed. The oxide layer 103 on the surface of 102 is subjected to threshold voltage ion implantation. The threshold voltage ion implantation is oblique ion implantation, that is, the implantation direction has a certain angle with the surface of the semiconductor substrate. In the traditional process, the threshold voltage is usually passed. Voltage ion implantation is used to modulate the threshold voltage of FINFET devices. Larger dopant implantation angle can increase the sensitivity of ion implantation, but it will cause shadow effects, which will negatively affect the performance of the device.

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