High-precision positioning method for LED chip array arrangement

Abstract

The present application provides a high-precision positioning method for LED chip array arrangement. The method includes the following steps that: a mask layout is designed according to chip size, a chip spacing, a cutting line position and knife width, and a mask plate is manufactured, wherein the mask layout contains a plurality of arrayed chip patterns; a flexible film is fixed onto one side ofthe mask plate, wherein the one side of the mask plate is provided with the mask layout, the flexible film is a transparent thin film resistant to temperatures greater than 150 DEG C, and a surface of the flexible film, which is far away from the mask plate, is an adhesive surface, the adhesive surface is used for fixing the chips; and a chip arrangement device with an image identification function is utilized to fix the chips on the adhesive surface, and the chip patterns on the mask plate are overlapped with the patterns of the arranged chips. With the method adopted, the accuracy of the arrangement spacing of the chips can be improved, the uniformity of the thickness of the encapsulant of the CSP (Chip Scale Package) chips and the uniformity of the color temperature of the CSP chips can be improved, and the yield of LED chip package can be improved.

Description

technical field [0001] The invention belongs to the technical field of LEDs, and in particular relates to a high-precision positioning method for array arrangement of LED chips. Background technique [0002] A light-emitting diode (Light-Emitting Diode, LED) is a semiconductor electronic device that converts electrical energy into light energy. Substrate-less chip-scale packaging (Chip Scale Package, CSP) of flip-chip LED is a new type of packaging technology for LED chips. Since CSP eliminates the carrier substrate, it reduces the increase in system thermal resistance caused by the carrier substrate. , so that the high-current carrying capacity of the obtained LED chip is further improved, and at the same time, the manufacturing process is shortened and the production cost is reduced, so the market share in the lighting market is getting higher and higher. The patent with application number 201510130969.5 discloses a specific method of encapsulation using CSP technology. ...

AI Technical Summary

Problems solved by technology

In this way, for a large-area chip arrangement, especially for a small-sized CSP, it is difficult to ensure that the thickness of the encapsulant on the upper part of the LED bare chip and the four side walls is the same, which will directly affect the yield rate of the LED chip package.

[0004] The patent application number 201610261522.6 discloses the light source assembly structure and manufacturing method of the flip-chip LED chip integrated package. It is precisely because the positioning accuracy of the chip array arrangement is not high that the P and N electrodes of the chip are caused by the position error of the interconnection. Integration failure, which directly affects the yield rate of chip integration

[0005] At present, there are high-precision chip layout equipment that can improve the accuracy to within ±10um, but the cost of this kind of chip layout equipment is as high as millions of yuan, and the investment cost is too high

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