A kind of semiconductor device and its manufacturing method, electronic device

Abstract

The present invention provides a semiconductor device, a manufacturing method thereof, and an electronic device. The manufacturing method includes: providing a semiconductor substrate on which an array of silicon-containing protrusions is formed; A current blocking layer is formed. The manufacturing method can form a current blocking layer on the top of the silicon-containing protrusion, thereby avoiding the formation of a conductive tip on the top of the silicon-containing protrusion, thereby relatively increasing the critical dimension of the conductive part at the top of the silicon-containing protrusion, reducing leakage current, and improving the performance of the silicon-containing protrusion. Device performance such as programming window, endurance, and data retention. The semiconductor device and electronic device have high performance.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device, a manufacturing method thereof, and an electronic device. Background technique [0002] With the development of semiconductor manufacturing technology, flash memory (flash memory) with faster access speed has been developed in terms of storage devices. Flash memory has the characteristics that information can be stored, read, and erased multiple times, and the stored information will not disappear after power failure. Therefore, flash memory has become a popular choice for personal computers and electronic devices. A widely used type of non-volatile memory. However, NAND (NAND gate) fast memory is widely used in fields with high read / write requirements due to its large storage capacity and relatively high performance. Recently, the capacity of NAND flash memory chips has reached 2GB, and the size is rapidly increasing. Solid state drives ...

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Problems solved by technology

[0003] As the critical dimensions of NAND flash memory cells shrink below 20nm, the critical dimensions of the floating gate (FG) are getting smaller and smaller. The thickness of (IPD) cannot be reduced all the time, for example, it must maintain a thickness of about 10nm. Under the influence of these two factors, such as figure 1 As shown by the dotted line area, the critical dimension of the top of the floating gate is very limited (in other words, the top of the floating gate forms a tip), which leads to a large leakage current in the IPD during programming, which in turn leads to a greatly reduced maximum threshold voltage in the programming window. Small, and the electronic trap (trap) in the IPD increases, which will affect the device performance, such as programming ability, endurance, data retention ability, etc.

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