Conductor structure, capacitor array structure and preparation method

Abstract

The present invention provides a polysilicon-based conductor structure, capacitor array structure and preparation method. The conductor structure preparation includes: providing a base, forming a cavity structure in the base; forming a conductor filling structure in the cavity structure, forming a conductor filling structure The material source at least includes a silicon source and a germanium source, and the germanium atoms in the germanium source serve as crystal nuclei for the silicon atoms in the silicon source to gather and grow, so as to increase the silicon crystal grain size in the conductor filling structure. Through the above scheme, the present invention proposes a method of manufacturing large-grain polysilicon, and introduces crystal nuclei elements, such as germanium, as silicon grains to gather and grow, so that silicon atoms gather and then increase the crystal grain size, and increasing the polycrystalline silicon crystal grain size can reduce the grain boundary The influence of traps on carriers increases the conductivity. The invention also prevents the influence of germanium in the conductor filling structure on the process through the setting of the protective layer, and achieves the effective connection between the conductor filling structure and other structural layers, further improving the Electrical properties of conductor-filled structures.

Description

technical field [0001] The invention belongs to the field of semiconductor devices and manufacturing, and in particular relates to a conductor structure based on a polysilicon process, a capacitor array structure and a preparation method. Background technique [0002] Dynamic Random Access Memory (DRAM for short) is a semiconductor storage device commonly used in computers, and is composed of many repeated storage units. Each memory cell usually includes a capacitor and a transistor; the gate of the transistor is connected to the word line, the drain is connected to the bit line, and the source is connected to the capacitor; the voltage signal on the word line can control the opening or closing of the transistor, and then through the bit line Read the data information stored in the capacitor, or write the data information into the capacitor through the bit line for storage. At present, in the DRAM process below 20nm, the DRAM adopts a stacked capacitor structure, and its ca...

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Problems solved by technology

[0005] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a conductor structure based on polysilicon process, a capacitor array structure and their respective preparation methods, which are used to solve the limitations of improving polysilicon crystal grain size and polysilicon crystallization in the prior art. Problems such as increased conductivity caused by too small particle size

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