Deep neural network acceleration platform based on FPGA

Abstract

The present invention discloses a deep neural network acceleration platform based on an FPGA. The platform comprises a general-purpose processor, an FPGA and a DRAM. The general-purpose processor is configured to analyze neural network configuration information and weight data and write the neural network configuration information and the weight data into the DRAM, the FPGA reads the configurationinformation from the DRAM to generate an FPGA accelerator, the general-purpose processor is configured to read in image information and write the image information into the DRAM, the FPGA acceleratorreads the image data from the DRAM and starts to calculate and writes a calculation result into the DRAM, and finally, the general-purpose processor reads a classification result from the DRAM. The accelerator allows each layer to be deployed on a FPGA chip at the same time, allows each layer to operate in a streamline mode, allows programmers having no hardware knowledge to utilize existing FPGAresources to easily obtain good performances.

Description

technical field [0001] The invention relates to an algorithm hardware acceleration platform, in particular to a design method of an FPGA-based deep neural network acceleration platform with good versatility and high flexibility. Background technique [0002] Neural network belongs to the connectionist school in the field of artificial intelligence, and is a mathematical model that uses a structure similar to the brain's synaptic connections for information processing. In the 1950s, the first generation of neural networks - the perceptron was born, which can realize linear classification, associative memory, etc.; in the 1980s, the multi-layer perceptron and its training algorithm - back propagation algorithm (back propagation, BP) , has been widely studied and applied because it can solve linearly inseparable problems. However, at that time, the relatively low hardware computing power and the network training algorithm easily fell into local minima and other problems, which...

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Problems solved by technology

[0008] Based on the analysis of the above acceleration platforms, it can be seen that FPGA is an attractive choice between the efficiency of ASIC and the programmability of general-purpose processors, but the development of FPGA requires certain hardware design experience and requires a long development process. cycle, and because of this, FPGAs shut out many software programmers

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