A semiconductor resistance bridge packaging structure and process

Abstract

The invention discloses a semiconductor resistance bridge packaging structure and process. The packaging structure is a two-layer structure, and comprises a semiconductor resistance bridge chip, two welding pieces, two electrodes and a layer of reinforcing insulation glue. The two leading-out terminal soldering pads of the semiconductor resistance bridge chip are subjected to sputtering, evaporation and other processes to form solder layers; the copper or copper alloy plate with a certain thickness is etched out of the core cavity through a wet-process semi-etching process, and the solder layers are plated thereon, the semiconductor resistance bridge chip is bonded in the core cavity of the semiconductor resistance bridge chip through the insulating glue, the large board soldering pieces with the solder layers and the two leading-out terminal soldering pads of the resistance bridge chip are welded to the electrodes through heating and pressurizing; a photoresist coats on the surface after the welding and an etching region is exposed and developed; etching is carried out in the wet etching liquid, so that the large board soldering pieces and the semi-etching large boards are disconnected to form two soldering pieces and two electrodes of the semiconductor resistance bridge; finally, the photoresist film, is removed and the product is obtained by inspection and testing. The packaging structure is of a two-layer structure, the packaging structure is simple, the interconnection resistance of the packaging structure is lower, and the external impact resistance is stronger; andthe metal wire bonding, encapsulation and cutting and packaging processes in the semiconductor resistance bridge packaging are replaced by a wet etching process and a heating and pressurizing weldingprocess, so that the packaging efficiency is higher.

Description

technical field [0001] The invention relates to the technical field of electronic packaging, in particular to a semiconductor resistance bridge packaging structure and a packaging process thereof. Background technique [0002] Existing resistor bridge packages usually install semiconductor resistor chips in the cavities of metal or ceramic bases (such as TO-shaped metal shells, pin pins, or surface-mounted ceramic bases, etc.), and use metal wires (such as gold wires / Gold strip or aluminum wire / aluminum strip, etc.) to interconnect the lead-out pad of the chip with the outer pin of the base, and then wrap the interconnection wire with insulating glue (including the chip bonding pad), the resistance of the semiconductor resistor chip The bridge area is exposed, or chip bonding, wire bonding, and encapsulation are performed on the printed circuit board (PCB). These all have many steps in the packaging process and large package size. The packaging is carried out one by one, an...

AI Technical Summary

Problems solved by technology

[0002] Existing resistor bridge packages usually install semiconductor resistor chips in the cavities of metal or ceramic bases (such as TO-shaped metal shells, pin pins, or surface-mounted ceramic bases, etc.), and use metal wires (such as gold wires / Gold strip or aluminum wire / aluminum strip, etc.) to interconnect the lead-out pad of the chip with the outer pin of the base, and then wrap the interconnection wire with insulating glue (including the chip bonding pad), the resistance of the semiconductor resistor chip The bridge area is exposed, or chip bonding, wire bonding, and encapsulation are performed on the printed circuit board (PCB). These all have many steps in the packaging process and large package size. The packaging is carried out one by one, and the packaging efficiency is low. , high packaging cost, and poor dimensional consistency after packaging, it cannot meet the requirements of automatic placement process

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