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Semiconductor metallization layer resistance welding method

A metallization layer, semiconductor technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problem that the packaging technology cannot meet the requirements of high density, and achieve simple design, simple operation process, and scope of application. wide effect

Inactive Publication Date: 2018-09-04
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] With the miniaturization, light weight, thinning, high performance, increase in the number of I / O ports and the development of functional diversification of electronic products, traditional packaging technology can no longer meet the requirements of high density.

Method used

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  • Semiconductor metallization layer resistance welding method
  • Semiconductor metallization layer resistance welding method
  • Semiconductor metallization layer resistance welding method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0035] Conduct solder resistance test on 0.45μm 96.5Sn3.0Ag0.5Cu solder balls (96.5, 3.0, 0.5 are percentages):

[0036] (1) Wafer coating, exposure, development, and drying;

[0037] (2) Etching the semiconductor substrate by dry method;

[0038] (3) Use PVD (Physical vapor deposition) and electroplating methods to prepare the required insulating layer, adhesion layer, seed layer, solderable layer, barrier layer, protective solderable layer, etc. on the semiconductor surface. In Example 1, the insulating layer, adhesion layer, etc. layer, seed layer, solderable layer, barrier layer, protective solderable layer are SiO 2 , Ti, Au, Cu, Ni, Au;

[0039] (4) After the Au layer of the protective solderable layer pad is coated with glue, the Au in the redundant area is corroded;

[0040] (5) Cr layer of sputtering solder resist layer;

[0041] (6) Scribing by automatic dicing machine;

[0042] (7) Solder resistance test was performed with 96.5Sn3.0Ag0.5Cu solder balls in a vac...

Embodiment 2

[0044] Conduct solder resistance test on 0.45μm 62Sn36Pb2Ag solder balls (62, 36, 2 are percentage contents):

[0045] (1) Wafer coating, exposure, development, and drying;

[0046] (2) Etching the semiconductor substrate by dry method;

[0047] (3) Prepare the required insulating layer, adhesion layer, seed layer, solderable layer, barrier layer, protective solderable layer, etc. on the surface of the semiconductor by methods such as PVD (Physical vapor deposition) and electroplating. In Example 1, the insulating layer, The adhesion layer, seed layer, solderable layer, barrier layer, and protective solderable layer are SiO 2 , Ti, Au, Cu, Ni, Au;

[0048] (4) After the Au layer of the protective solderable layer pad is coated with glue, the Au in the redundant area is corroded;

[0049] (5) Cr layer of sputtering solder resist layer;

[0050] (6) Scribing by automatic dicing machine;

[0051] (7) Solder resistance test was performed with 62Sn36Pb2Ag solder balls in a vac...

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Abstract

The invention relates to a semiconductor metallization layer resistance welding method. The method includes the following steps that: (1) wafer adhesive coating, exposing, developing, and drying are carried out; (2) a semiconductor substrate is etched with dry or wet etching; (3) a required insulating layer, adhesion layer, seed layer, solderable layer, barrier layer and protective solderable layer are prepared on the surface of the semiconductor by means of sputtering, evaporation, PVD (Physical vapor deposition), CVD (Chemical vapor deposition), or electroplating; (4) the protective solderable layer at a redundant region is removed by means of etching; (5) a required solder mask is prepared on the surface of the protective solderable layer by means of sputtering, evaporation, PVD, CVD orelectroplating; (6) an automatic scribing machine is adopted to perform wafer scribing; and (7) solder balls are selected for welding interconnection. With the method adopted, the problem of resistance welding between a semiconductor metallization layer and solder balls can be solved, and a practically feasible resistance welding method can be provided for resistance welding between the semiconductor metallization layer and the solder balls. The method has the advantages of simple design, high operability and high applicability.

Description

technical field [0001] The invention relates to a method for resisting soldering of a semiconductor metallization layer, which belongs to the technical fields of micro-interconnect solder joint structure preparation, new material technology and semiconductor device manufacturing technology, and provides a method for the connection between the semiconductor metallization layer and solder balls. Practical solder mask method. Background technique [0002] With the miniaturization, light weight, thinning, high performance, increase in the number of I / O ports and the development of functional diversification of electronic products, traditional packaging technology can no longer meet the requirements of high density. The development of two-dimensional and three-dimensional stacking technology has brought hope for high-density packaging. High-density two-dimensional and three-dimensional stacking technologies often use tin-based or indium-based solder balls to achieve electrical i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
CPCH01L21/76895H01L2924/181H01L24/05H01L24/03H01L24/11H01L2224/13111H01L24/13H01L2224/1145H01L2224/11452H01L2224/11462H01L2224/1147H01L2224/1148H01L2924/01029H01L2924/01047H01L2924/01082
Inventor 田飞飞张洪泽张君直周明
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD